gpasm-1.7.0_beta1 (Oct 26 2015)MC32P7511_RAM_test.asm2015-10-26  17:39:58         PAGE  1


LOC  OBJECT CODE     LINE SOURCE TEXT
  VALUE

                      00001 #include "mc32p7511.inc"
                      00001 
                      00002 
                      00003 ;mc32p7511 header file
                      00004 ;
                      00005 ; 
                      00006 
                      00007 ;define must write at first row
                      00008        
  00000180            00009 INDF0       EQU     0x180
  00000181            00010 INDF1       EQU     0x181
  00000182            00011 INDF2       EQU     0x182
  00000183            00012 HIBYTE      EQU     0x183
  00000184            00013 FSR0        EQU     0x184
  00000185            00014 FSR1        EQU     0x185
  00000186            00015 PCL         EQU     0x186
  00000187            00016 PFLAG       EQU     0x187
  00000188            00017 MCR         EQU     0x188
  00000189            00018 INDF3       EQU     0x189   
  0000018A            00019 INTE0       EQU     0x18A
  0000018B            00020 INTF0       EQU     0x18B
  00000190            00021 IOP0        EQU     0x190
  00000191            00022 OEP0        EQU     0x191
  00000192            00023 PUP0        EQU     0x192
  00000193            00024 PDP0        EQU     0x193
  00000194            00025 IOP1        EQU     0x194
  00000195            00026 OEP1        EQU     0x195
  00000196            00027 PUP1        EQU     0x196
  00000197            00028 PDP1        EQU     0x197
  00000198            00029 PWM0DE      EQU     0x198
  00000199            00030 PWM1DE      EQU     0x199
  000001A0            00031 T0CR        EQU     0x1A0
  000001A1            00032 T0CNT       EQU     0x1A1
  000001A2            00033 T0LOAD      EQU     0x1A2
  000001A3            00034 T0DATA      EQU     0x1A3
  000001A4            00035 T1CR        EQU     0x1A4
  000001A5            00036 T1CNT       EQU     0x1A5
  000001A6            00037 T1LOAD      EQU     0x1A6
  000001A7            00038 T1DATA      EQU     0x1A7
  000001A8            00039 AUCR        EQU     0x1A8
  000001A9            00040 KBCR        EQU     0x1A9
  000001AE            00041 OSCM        EQU     0x1AE
  000001AF            00042 LVDCR       EQU     0x1AF
  000001B0            00043 ADCR0       EQU     0x1B0
  000001B1            00044 ADCR1       EQU     0x1B1
  000001B2            00045 AN0SEL      EQU     0x1B2
  000001B3            00046 AN1SEL      EQU     0x1B3
  000001B4            00047 ADRH        EQU     0x1B4
  000001B5            00048 ADRL        EQU     0x1B5
  000001B6            00049 ADCR2       EQU     0x1B6
  000001FA            00050 OSCCAL      EQU     0x1FA
                      00051 
                      00052 #define         STATUS          PFLAG
                      00053 #define         INDF              INDF0
                      00054 #define         FSR                 FSR0
                      00055 #define         P0HCON          PUP0
                      00056 #define         P1HCON          PUP1
                      00057 #define         INTECON         INTE
                      00058 #define         INTFLAG   INTF
                      00059 
                      00060 
                      00061 ;INDF0 
                      00062 #define         INDF07          INDF0,7
                      00063 #define         INDF06          INDF0,6
                      00064 #define         INDF05          INDF0,5
                      00065 #define         INDF04          INDF0,4
                      00066 #define         INDF03          INDF0,3
                      00067 #define         INDF02          INDF0,2
                      00068 #define         INDF01          INDF0,1
                      00069 #define         INDF00          INDF0,0 
                      00070 
                      00071 ;INDF1 
                      00072 #define         INDF17          INDF1,7
                      00073 #define         INDF16          INDF1,6
                      00074 #define         INDF15          INDF1,5
                      00075 #define         INDF14          INDF1,4
                      00076 #define         INDF13          INDF1,3
                      00077 #define         INDF12          INDF1,2
                      00078 #define         INDF11          INDF1,1
                      00079 #define         INDF10          INDF1,0
                      00080 
                      00081 ;INDF2 
                      00082 #define         INDF27          INDF2,7
                      00083 #define         INDF26          INDF2,6
                      00084 #define         INDF25          INDF2,5
                      00085 #define         INDF24          INDF2,4
                      00086 #define         INDF23          INDF2,3
                      00087 #define         INDF22          INDF2,2
                      00088 #define         INDF21          INDF2,1
                      00089 #define         INDF20          INDF2,0 
                      00090 
                      00091 ;HIBYTE
                      00092 #define         HIBYTE7         HIBYTE,7
                      00093 #define         HIBYTE6         HIBYTE,6
                      00094 #define         HIBYTE5         HIBYTE,5
                      00095 #define         HIBYTE4         HIBYTE,4
                      00096 #define         HIBYTE3         HIBYTE,3
                      00097 #define         HIBYTE2         HIBYTE,2
                      00098 #define         HIBYTE1         HIBYTE,1
                      00099 #define         HIBYTE0         HIBYTE,0
                      00100 
                      00101 ;FSR0 
                      00102 #define         FSR07           FSR0,7
                      00103 #define         FSR06           FSR0,6
                      00104 #define         FSR05           FSR0,5
                      00105 #define         FSR04           FSR0,4
                      00106 #define         FSR03           FSR0,3
                      00107 #define         FSR02           FSR0,2
                      00108 #define         FSR01           FSR0,1
                      00109 #define         FSR00           FSR0,0 
                      00110 
                      00111 ;FSR1
                      00112 #define         FSR17           FSR1,7
                      00113 #define         FSR16           FSR1,6
                      00114 #define         FSR15           FSR1,5
                      00115 #define         FSR14           FSR1,4
                      00116 #define         FSR13           FSR1,3
                      00117 #define         FSR12           FSR1,2
                      00118 #define         FSR11           FSR1,1
                      00119 #define         FSR10           FSR1,0
                      00120 
                      00121 ;PCL 
                      00122 #define         PC7             PCL,7
                      00123 #define         PC6             PCL,6
                      00124 #define         PC5             PCL,5
                      00125 #define         PC4             PCL,4
                      00126 #define         PC3             PCL,3
                      00127 #define         PC2             PCL,2
                      00128 #define         PC1             PCL,1
                      00129 #define         PC0             PCL,0 
                      00130 
                      00131 ;PFLAG
                      00132 #define         Z               PFLAG,2
                      00133 #define         DC              PFLAG,1
                      00134 #define         C               PFLAG,0
                      00135 
                      00136 ;MCR 
                      00137 #define         GIE             MCR,7
                      00138 #define         TO              MCR,5
                      00139 #define         PD              MCR,4
                      00140 #define         MINT11          MCR,3
                      00141 #define         MINT10          MCR,2
                      00142 #define         MINT01          MCR,1
                      00143 #define         MINT00          MCR,0
                      00144 
                      00145 ;INDF3 
                      00146 #define         INDF37          INDF3,7
                      00147 #define         INDF36          INDF3,6
                      00148 #define         INDF35          INDF3,5
                      00149 #define         INDF34          INDF3,4
                      00150 #define         INDF33          INDF3,3
                      00151 #define         INDF32          INDF3,2
                      00152 #define         INDF31          INDF3,1
                      00153 #define         INDF30          INDF3,0 
                      00154 
                      00155 ;INTE0
                      00156 #define         ADIE            INTE0,6
                      00157 #define         LVDIE           INTE0,5
                      00158 #define         KBIE            INTE0,4
                      00159 #define         INT1IE          INTE0,3
                      00160 #define         INT0IE          INTE0,2
                      00161 #define         T1IE            INTE0,1
                      00162 #define         T0IE            INTE0,0
                      00163 
                      00164 ;INTF0
                      00165 #define         ADIF            VREFH,6
                      00166 #define         LVDIF           VREFH,5
                      00167 #define         KBIF            VREFH,4
                      00168 #define         INT1IF          VREFH,3
                      00169 #define         INT0IF          VREFH,2
                      00170 #define         T1IF            VREFH,1
                      00171 #define         T0IF            VREFH,0
                      00172 
                      00173 ;IOP0
                      00174 #define         P06D            IOP0,6
                      00175 #define         P05D            IOP0,5
                      00176 #define         P04D              IOP0,4
                      00177 #define         P03D            IOP0,3
                      00178 #define         P02D            IOP0,2
                      00179 #define         P01D            IOP0,1
                      00180 #define         P00D              IOP0,0
                      00181 
                      00182 ;OEP0
                      00183 #define         P06OE           OEP0,6
                      00184 #define         P05OE           OEP0,5
                      00185 #define         P04OE           OEP0,4
                      00186 #define         P03OE           OEP0,3
                      00187 #define         P02OE           OEP0,2
                      00188 #define         P01OE           OEP0,1
                      00189 #define         P00OE           OEP0,0
                      00190 
                      00191 ;PUP0
                      00192 #define         P06PU           PUP0,6
                      00193 #define         P05PU           PUP0,5
                      00194 #define         P04PU           PUP0,4
                      00195 #define         P03PU           PUP0,3
                      00196 #define         P02PU           PUP0,2
                      00197 #define         P01PU           PUP0,1
                      00198 #define         P00PU           PUP0,0
                      00199 
                      00200 ;PDP0
                      00201 #define         P06PD           PDP0,6
                      00202 #define         P05PD           PDP0,5
                      00203 #define         P04PD           PDP0,4
                      00204 #define         P03PD           PDP0,3
                      00205 #define         P02PD           PDP0,2
                      00206 #define         P01PD           PDP0,1
                      00207 #define         P00PD           PDP0,0
                      00208 
                      00209 ;IOP1
                      00210 #define         P16D            IOP1,6
                      00211 #define         P15D            IOP1,5
                      00212 #define         P14D              IOP1,4
                      00213 #define         P13D            IOP1,3
                      00214 #define         P12D            IOP1,2
                      00215 #define         P11D            IOP1,1
                      00216 #define         P10D              IOP1,0
                      00217 
                      00218 ;OEP1
                      00219 #define         P16OE           OEP1,6
                      00220 #define         P15OE           OEP1,5
                      00221 #define         P14OE           OEP1,4
                      00222 #define         P13OE           OEP1,3
                      00223 #define         P12OE           OEP1,2
                      00224 #define         P11OE           OEP1,1
                      00225 #define         P10OE           OEP1,0
                      00226 
                      00227 ;PUP1
                      00228 #define         P16PU           PUP1,6
                      00229 #define         P15PU           PUP1,5
                      00230 #define         P14PU           PUP1,4
                      00231 #define         P13PU           PUP1,3
                      00232 #define         P12PU           PUP1,2
                      00233 #define         P11PU           PUP1,1
                      00234 #define         P10PU           PUP1,0
                      00235 
                      00236 ;PDP1
                      00237 #define         P16PD           PDP1,6
                      00238 #define         P15PD           PDP1,5
                      00239 #define         P14PD           PDP1,4
                      00240 #define         P13PD           PDP1,3
                      00241 #define         P12PD           PDP1,2
                      00242 #define         P11PD           PDP1,1
                      00243 #define         P10PD           PDP1,0
                      00244 
                      00245 ;PWM0DE
                      00246 #define         PWM0INV         PWM0DE,4
                      00247 #define         PMODE0          PWM0DE,3
                      00248 #define         PWM0DE2         PWM0DE,2
                      00249 #define         PWM0DE1         PWM0DE,1
                      00250 #define         PWM0DE0         PWM0DE,0
                      00251 
                      00252 ;PWM1DE
                      00253 #define         PWM1INV         PWM1DE,4
                      00254 #define         PMODE1          PWM1DE,3
                      00255 #define         PWM1DE2         PWM1DE,2
                      00256 #define         PWM1DE1         PWM1DE,1
                      00257 #define         PWM1DE0         PWM1DE,0
                      00258 
                      00259 ;T0CR
                      00260 #define         TC0EN           T0CR,7
                      00261 #define         PWM0OE          T0CR,6
                      00262 #define         BUZ0OE          T0CR,5
                      00263 #define         T0PTS1          T0CR,4
                      00264 #define         T0PTS0          T0CR,3
                      00265 #define         T0PR2           T0CR,2
                      00266 #define         T0PR1           T0CR,1
                      00267 #define         T0PR0           T0CR,0
                      00268 
                      00269 ;T0CNT
                      00270 #define         T0C7            T0CNT,7
                      00271 #define         T0C6            T0CNT,6
                      00272 #define         T0C5            T0CNT,5
                      00273 #define         T0C4            T0CNT,4
                      00274 #define         T0C3            T0CNT,3
                      00275 #define         T0C2            T0CNT,2
                      00276 #define         T0C1            T0CNT,1
                      00277 #define         T0C0            T0CNT,0
                      00278 
                      00279 ;T0LOAD
                      00280 #define         T0LOAD7         T0LOAD,7
                      00281 #define         T0LOAD6         T0LOAD,6
                      00282 #define         T0LOAD5         T0LOAD,5
                      00283 #define         T0LOAD4         T0LOAD,4
                      00284 #define         T0LOAD3         T0LOAD,3
                      00285 #define         T0LOAD2         T0LOAD,2
                      00286 #define         T0LOAD1         T0LOAD,1
                      00287 #define         T0LOAD0         T0LOAD,0
                      00288 
                      00289 ;T0DATA
                      00290 #define         T0DATA7         T0DATA,7
                      00291 #define         T0DATA6         T0DATA,6
                      00292 #define         T0DATA5         T0DATA,5
                      00293 #define         T0DATA4         T0DATA,4
                      00294 #define         T0DATA3         T0DATA,3
                      00295 #define         T0DATA2         T0DATA,2
                      00296 #define         T0DATA1         T0DATA,1
                      00297 #define         T0DATA0         T0DATA,0
                      00298 
                      00299 ;T1CR
                      00300 #define         TC1EN           T1CR,7
                      00301 #define         PWM1OE          T1CR,6
                      00302 #define         BUZ1OE          T1CR,5
                      00303 #define         T1PTS1          T1CR,4
                      00304 #define         T1PTS0          T1CR,3
                      00305 #define         T1PR2           T1CR,2
                      00306 #define         T1PR1           T1CR,1
                      00307 #define         T1PR0           T1CR,0
                      00308 
                      00309 ;T1CNT
                      00310 #define         T1C7            T1CNT,7
                      00311 #define         T1C6            T1CNT,6
                      00312 #define         T1C5            T1CNT,5
                      00313 #define         T1C4            T1CNT,4
                      00314 #define         T1C3            T1CNT,3
                      00315 #define         T1C2            T1CNT,2
                      00316 #define         T1C1            T1CNT,1
                      00317 #define         T1C0            T1CNT,0
                      00318 
                      00319 ;T1LOAD
                      00320 #define         T1LOAD7         T1LOAD,7
                      00321 #define         T1LOAD6         T1LOAD,6
                      00322 #define         T1LOAD5         T1LOAD,5
                      00323 #define         T1LOAD4         T1LOAD,4
                      00324 #define         T1LOAD3         T1LOAD,3
                      00325 #define         T1LOAD2         T1LOAD,2
                      00326 #define         T1LOAD1         T1LOAD,1
                      00327 #define         T1LOAD0         T1LOAD,0
                      00328 
                      00329 ;T1DATA
                      00330 #define         T1DATA7         T1DATA,7
                      00331 #define         T1DATA6         T1DATA,6
                      00332 #define         T1DATA5         T1DATA,5
                      00333 #define         T1DATA4         T1DATA,4
                      00334 #define         T1DATA3         T1DATA,3
                      00335 #define         T1DATA2         T1DATA,2
                      00336 #define         T1DATA1         T1DATA,1
                      00337 #define         T1DATA0         T1DATA,0
                      00338 
                      00339 ;AUCR
                      00340 #define         DRVEN           AUCR,7
                      00341 #define         SPDSL           AUCR,6
                      00342 #define         P04WP           AUCR,5
                      00343 #define         P13SP           AUCR,4
                      00344 #define         P01DV           AUCR,3
                      00345 #define         P11DV           AUCR,2
                      00346 #define         PMOS1ON         AUCR,1
                      00347 #define         NMOS0ON         AUCR,0
                      00348 
                      00349 ;KBCR
                      00350 #define         KBCR6           KBCR,6
                      00351 #define         KBCR5           KBCR,5
                      00352 #define         KBCR4           KBCR,4
                      00353 #define         KBCR3           KBCR,3
                      00354 #define         KBCR2           KBCR,2
                      00355 #define         KBCR1           KBCR,1
                      00356 #define         KBCR0           KBCR,0
                      00357 
                      00358 ;OSCM
                      00359 #define         STBL            OSCM,5
                      00360 #define         STBH            OSCM,4
                      00361 #define         CLKS            OSCM,2
                      00362 #define         LFEN            OSCM,1
                      00363 #define         HFEN            OSCM,0
                      00364 
                      00365 ;LVDCR
                      00366 #define         LVDEN           LVDCR,7
                      00367 #define         LVDS3           LVDCR,6
                      00368 #define         LVDS2           LVDCR,5
                      00369 #define         LVDS1           LVDCR,4
                      00370 #define         LVDS0           LVDCR,3
                      00371 #define         LVDF            LVDCR,0
                      00372 
                      00373 ;ADCR0
                      00374 #define         ADCHS3          ADCR0,7
                      00375 #define         ADCHS2          ADCR0,6
                      00376 #define         ADCHS1          ADCR0,5
                      00377 #define         ADCHS0          ADCR0,4
                      00378 #define         ADLEN           ADCR0,3
                      00379 #define         ADEOC           ADCR0,1
                      00380 #define         ADON            ADCR0,0
                      00381 
                      00382 ;ADCR1
                      00383 #define         ADCKS2          ADCR1,7
                      00384 #define         ADCKS1          ADCR1,6
                      00385 #define         ADCKS0          ADCR1,5
                      00386 #define         ADTST           ADCR1,4
                      00387 #define         RESS0           ADCR1,3
                      00388 #define         VRS2            ADCR1,2
                      00389 #define         VRS1            ADCR1,1
                      00390 #define         VRS0            ADCR1,0
                      00391 
                      00392 ;ADCR2
                      00393 #define         ADSMP3          ADCR2,3
                      00394 #define         ADSMP2          ADCR2,2
                      00395 #define         ADSMP1          ADCR2,1
                      00396 #define         ADSMP0          ADCR2,0
                      00397 
                      00398 ;AN0SEL
                      00399 #define         P06ANS          AN0SEL,6
                      00400 #define         P05ANS          AN0SEL,5
                      00401 #define         P04ANS          AN0SEL,4
                      00402 #define         P03ANS          AN0SEL,3
                      00403 #define         P02ANS          AN0SEL,2
                      00404 #define         P01ANS          AN0SEL,1
                      00405 #define         P00ANS          AN0SEL,0
                      00406 
                      00407 ;AN1SEL
                      00408 #define         P16ANS          AN1SEL,6
                      00409 #define         P15ANS          AN1SEL,5
                      00410 #define         P14ANS          AN1SEL,4
                      00411 #define         P13ANS          AN1SEL,3
                      00412 #define         P12ANS          AN1SEL,2
                      00413 #define         P11ANS          AN1SEL,1
                      00414 #define         P10ANS          AN1SEL,0
                      00415 
                      00416 ;ADRH
                      00417 #define         ADR11           ADRH,7
                      00418 #define         ADR10           ADRH,6
                      00419 #define         ADR9            ADRH,5
                      00420 #define         ADR8            ADRH,4
                      00421 #define         ADR7            ADRH,3
                      00422 #define         ADR6            ADRH,2
                      00423 #define         ADR5            ADRH,1
                      00424 #define         ADR4            ADRH,0
                      00425 
                      00426 ;ADRL
                      00427 #define         ADR3            ADRL,3
                      00428 #define         ADR2            ADRL,2
                      00429 #define         ADR1            ADRL,1
                      00430 #define         ADR0            ADRL,0
  00000000            00002 end_addr        equ     0x00
  00000001            00003 goal_data       equ     0x01
  00000002            00004 rw_data         equ     0x02
  00000003            00005 rw_addr         equ     0x03
  00000004            00006 cnt             equ     0x04
                      00007 
                      00008         org     0x00
0000   A000           00009         goto    start
                      00010         org     0x08
                      00011 
                      00012        
0008                  00013 start:
0008   8000           00014         call    init
0009   3C00           00015         movai   0x00
000A   5602           00016         movra   rw_data
000B   3C00           00017         movai   0x00
000C   5601           00018         movra   goal_data
000D                  00019 loop:
                      00020        ;        clrr    fsr1
000D   3C05           00021         movai   0x05
000E   5603           00022         movra   rw_addr
000F   3C7F           00023         movai   0x7f
0010   5600           00024         movra   end_addr
0011   8000           00025         call    ram_write
0012   0000           00026         nop
0013   3C7B           00027         movai   0x7b
0014   5604           00028         movra   cnt
                      00029        ;        clrr    fsr1
0015   000E           00030         clrwdt
                      00031 
0016   3C05           00032         movai   0x05
0017   5603           00033         movra   rw_addr
0018   3C7F           00034         movai   0x7f
0019   5600           00035         movra   end_addr
001A   8000           00036         call    ram_read
001B   0000           00037         nop
001C   000E           00038         clrwdt
                      00039         
001D   6E02           00040         decr    rw_data
001E   6A01           00041         djzr    goal_data
001F   A000           00042         goto    loop
0020   A000           00043         goto    circle_test
                      00044         
0021                  00045 circle_test:              
0021   3C05           00046         movai   0x05
0022   5603           00047         movra   rw_addr
0023   3C00           00048         movai   0x00
0024   5602           00049         movra   rw_data
0025   3C7F           00050         movai   0x7f
0026   5600           00051         movra   end_addr
0027   8000           00052         call    ram_write2
0028   0000           00053         nop
0029   3C7B           00054         movai   0x7b
002A   5604           00055         movra   cnt
                      00056        ;        clrr    fsr1
002B   000E           00057         clrwdt
                      00058 
002C   3C05           00059         movai   0x05
002D   5603           00060         movra   rw_addr
002E   3C00           00061         movai   0x00
002F   5601           00062         movra   goal_data
0030   3C7F           00063         movai   0x7f
0031   5600           00064         movra   end_addr
0032   8000           00065         call    ram_read2
0033   0000           00066         nop
0034   000E           00067         clrwdt
                      00068 
0035                  00069 pass_loop:
0035   C194           00070         bset    IOP1,0
0036   0000           00071         nop
0037   0000           00072         nop
0038   D194           00073         bclr    IOP1,0
0039   A000           00074         goto    pass_loop
                      00075        
003A                  00076 init:
003A   3CFF           00077         movai   0xff
003B   5795           00078         movra   OEP1
003C   5796           00079         movra   PUP1
003D   5794           00080         movra   IOP1
003E   000C           00081         return
                      00082        
003F                  00083 ram_write:
003F   7785           00084         clrr    FSR1
0040   5803           00085         movar   rw_addr
0041   5784           00086         movra   FSR0
0042                  00087 fsr0_write:
0042   5802           00088         movar   rw_data
0043   5780           00089         movra   INDF0
0044   6384           00090         jzr     FSR0
0045   A000           00091         goto    fsr0_write
                      00092 ;               movai   0x00
                      00093 ;               movra   fsr1
                      00094 ;               clrr    fsr0
                      00095 ;fsr1_write:
                      00096 ;               movar   rw_data
                      00097 ;               movra   indf1   
                      00098 ;               incr    fsr1
                      00099 ;               movar   fsr1
                      00100 ;               isubai  0xb0
                      00101 ;               jbset   z
                      00102 ;               goto    fsr1_write
0046   000C           00103         return
0047                  00104 ram_write2:
0047   7785           00105         clrr    FSR1
0048   5803           00106         movar   rw_addr
0049   5784           00107         movra   FSR0
004A                  00108 fsr0_write2:
004A   5802           00109         movar   rw_data
004B   5780           00110         movra   INDF0
004C   6602           00111         incr    rw_data
004D   6384           00112         jzr     FSR0     ;R加1，结果存到R，结果为零，则跳过下一条指令
004E   A000           00113         goto    fsr0_write2
                      00114 ;               movai   0x00
                      00115 ;               movra   fsr1
                      00116 ;               clrr    fsr0
                      00117 ;fsr1_write2:
                      00118 ;               movar   rw_data
                      00119 ;               movra   indf1   
                      00120 ;               incr    fsr1
                      00121 ;               movar   fsr1
                      00122 ;               isubai  0xb0
                      00123 ;               jbset   z
                      00124 ;               goto    fsr1_write2
004F   000C           00125         return
                      00126        
0050                  00127 ram_read:
0050   7785           00128         clrr    FSR1
0051   5803           00129         movar   rw_addr
0052   5784           00130         movra   FSR0
0053                  00131 fsr0_read:
0053   5980           00132         movar   INDF0 
0054   4801           00133         rsubar  goal_data   ;寄存器R内容和ACC相减，结果存到ACC
0055   E587           00134         jbset   Z
0056   A000           00135         goto    error_loop
0057   6784           00136         incr    FSR0   ;R加1，结果存到R
0058   6A04           00137         djzr    cnt     ;R减1，结果存到R，结果为0，则跳过下一条指令
0059   A000           00138         goto    fsr0_read
                      00139 ;               movai   0x00
                      00140 ;               movra   fsr1
                      00141 ;               clrr    fsr0
                      00142 ;fsr1_read:
                      00143 ;               movar   indf1 
                      00144 ;               rsubar  goal_data
                      00145 ;               jbset   z
                      00146 ;               goto    error_loop
                      00147 ;               incr    fsr1
                      00148 ;               movar   fsr1
                      00149 ;               isubai  0xb0
                      00150 ;               jbset   z
                      00151 ;               goto    fsr1_read
005A   000C           00152         return
                      00153        
005B                  00154 ram_read2:
005B   7785           00155         clrr    FSR1
005C   5803           00156         movar   rw_addr
005D   5784           00157         movra   FSR0       
005E                  00158 fsr0_read2:
005E   5980           00159         movar   INDF0 
005F   4801           00160         rsubar  goal_data
0060   E587           00161         jbset   Z
0061   A000           00162         goto    error_loop
0062   6601           00163         incr    goal_data
0063   6784           00164         incr    FSR0
0064   6A04           00165         djzr    cnt
0065   A000           00166         goto    fsr0_read2
                      00167 ;               movai   0x00
                      00168 ;               movra   fsr1
                      00169 ;               clrr    fsr0
                      00170 ;fsr1_read2:
                      00171 ;               movar   indf1 
                      00172 ;               rsubar  goal_data
                      00173 ;               jbset   z
                      00174 ;               goto    error_loop
                      00175 ;               incr    fsr1
                      00176 ;               movar   fsr1
                      00177 ;               isubai  0xb0
                      00178 ;               jbset   z               goto    fsr1_read2
0066   000C           00179         return       
0067                  00180 error_loop:
0067   C394           00181         bset    IOP1,1
0068   0000           00182         nop
0069   0000           00183         nop
006A   D394           00184         bclr    IOP1,1
006B   A000           00185         goto    error_loop
                      00186      
                      00187    end         
gpasm-1.7.0_beta1 (Oct 26 2015)MC32P7511_RAM_test.asm2015-10-26  17:39:58         PAGE  2


SYMBOL TABLE
  LABEL                             VALUE

ADCR0                             000001B0
ADCR1                             000001B1
ADCR2                             000001B6
ADRH                              000001B4
ADRL                              000001B5
AN0SEL                            000001B2
AN1SEL                            000001B3
AUCR                              000001A8
FSR0                              00000184
FSR1                              00000185
HIBYTE                            00000183
INDF0                             00000180
INDF1                             00000181
INDF2                             00000182
INDF3                             00000189
INTE0                             0000018A
INTF0                             0000018B
IOP0                              00000190
IOP1                              00000194
KBCR                              000001A9
LVDCR                             000001AF
MCR                               00000188
OEP0                              00000191
OEP1                              00000195
OSCCAL                            000001FA
OSCM                              000001AE
PCL                               00000186
PDP0                              00000193
PDP1                              00000197
PFLAG                             00000187
PUP0                              00000192
PUP1                              00000196
PWM0DE                            00000198
PWM1DE                            00000199
T0CNT                             000001A1
T0CR                              000001A0
T0DATA                            000001A3
T0LOAD                            000001A2
T1CNT                             000001A5
T1CR                              000001A4
T1DATA                            000001A7
T1LOAD                            000001A6
__32P21                           00000001
circle_test                       00000021
cnt                               00000004
end_addr                          00000000
error_loop                        00000067
fsr0_read                         00000053
fsr0_read2                        0000005E
fsr0_write                        00000042
fsr0_write2                       0000004A
goal_data                         00000001
init                              0000003A
loop                              0000000D
pass_loop                         00000035
ram_read                          00000050
ram_read2                         0000005B
ram_write                         0000003F
ram_write2                        00000047
rw_addr                           00000003
rw_data                           00000002
start                             00000008
ADCHS0                            ADCR0,4
ADCHS1                            ADCR0,5
ADCHS2                            ADCR0,6
ADCHS3                            ADCR0,7
ADCKS0                            ADCR1,5
ADCKS1                            ADCR1,6
ADCKS2                            ADCR1,7
ADEOC                             ADCR0,1
ADIE                              INTE0,6
ADIF                              VREFH,6
ADLEN                             ADCR0,3
ADON                              ADCR0,0
ADR0                              ADRL,0
ADR1                              ADRL,1
ADR10                             ADRH,6
ADR11                             ADRH,7
ADR2                              ADRL,2
ADR3                              ADRL,3
ADR4                              ADRH,0
ADR5                              ADRH,1
ADR6                              ADRH,2
ADR7                              ADRH,3
ADR8                              ADRH,4
ADR9                              ADRH,5
ADSMP0                            ADCR2,0
ADSMP1                            ADCR2,1
ADSMP2                            ADCR2,2
ADSMP3                            ADCR2,3
ADTST                             ADCR1,4
BUZ0OE                            T0CR,5
BUZ1OE                            T1CR,5
C                                 PFLAG,0
CLKS                              OSCM,2
DC                                PFLAG,1
DRVEN                             AUCR,7
FSR                               FSR0
FSR00                             FSR0,0
FSR01                             FSR0,1
FSR02                             FSR0,2
FSR03                             FSR0,3
FSR04                             FSR0,4
FSR05                             FSR0,5
FSR06                             FSR0,6
FSR07                             FSR0,7
FSR10                             FSR1,0
FSR11                             FSR1,1
FSR12                             FSR1,2
FSR13                             FSR1,3
FSR14                             FSR1,4
FSR15                             FSR1,5
FSR16                             FSR1,6
FSR17                             FSR1,7
GIE                               MCR,7
HFEN                              OSCM,0
HIBYTE0                           HIBYTE,0
HIBYTE1                           HIBYTE,1
HIBYTE2                           HIBYTE,2
HIBYTE3                           HIBYTE,3
HIBYTE4                           HIBYTE,4
HIBYTE5                           HIBYTE,5
HIBYTE6                           HIBYTE,6
HIBYTE7                           HIBYTE,7
INDF                              INDF0
INDF00                            INDF0,0
INDF01                            INDF0,1
INDF02                            INDF0,2
INDF03                            INDF0,3
INDF04                            INDF0,4
INDF05                            INDF0,5
INDF06                            INDF0,6
INDF07                            INDF0,7
INDF10                            INDF1,0
INDF11                            INDF1,1
INDF12                            INDF1,2
INDF13                            INDF1,3
INDF14                            INDF1,4
INDF15                            INDF1,5
INDF16                            INDF1,6
INDF17                            INDF1,7
INDF20                            INDF2,0
INDF21                            INDF2,1
INDF22                            INDF2,2
INDF23                            INDF2,3
INDF24                            INDF2,4
INDF25                            INDF2,5
INDF26                            INDF2,6
INDF27                            INDF2,7
INDF30                            INDF3,0
INDF31                            INDF3,1
INDF32                            INDF3,2
INDF33                            INDF3,3
INDF34                            INDF3,4
INDF35                            INDF3,5
INDF36                            INDF3,6
INDF37                            INDF3,7
INT0IE                            INTE0,2
INT0IF                            VREFH,2
INT1IE                            INTE0,3
INT1IF                            VREFH,3
INTECON                           INTE
INTFLAG                           INTF
KBCR0                             KBCR,0
KBCR1                             KBCR,1
KBCR2                             KBCR,2
KBCR3                             KBCR,3
KBCR4                             KBCR,4
KBCR5                             KBCR,5
KBCR6                             KBCR,6
KBIE                              INTE0,4
KBIF                              VREFH,4
LFEN                              OSCM,1
LVDEN                             LVDCR,7
LVDF                              LVDCR,0
LVDIE                             INTE0,5
LVDIF                             VREFH,5
LVDS0                             LVDCR,3
LVDS1                             LVDCR,4
LVDS2                             LVDCR,5
LVDS3                             LVDCR,6
MINT00                            MCR,0
MINT01                            MCR,1
MINT10                            MCR,2
MINT11                            MCR,3
NMOS0ON                           AUCR,0
P00ANS                            AN0SEL,0
P00D                              IOP0,0
P00OE                             OEP0,0
P00PD                             PDP0,0
P00PU                             PUP0,0
P01ANS                            AN0SEL,1
P01D                              IOP0,1
P01DV                             AUCR,3
P01OE                             OEP0,1
P01PD                             PDP0,1
P01PU                             PUP0,1
P02ANS                            AN0SEL,2
P02D                              IOP0,2
P02OE                             OEP0,2
P02PD                             PDP0,2
P02PU                             PUP0,2
P03ANS                            AN0SEL,3
P03D                              IOP0,3
P03OE                             OEP0,3
P03PD                             PDP0,3
P03PU                             PUP0,3
P04ANS                            AN0SEL,4
P04D                              IOP0,4
P04OE                             OEP0,4
P04PD                             PDP0,4
P04PU                             PUP0,4
P04WP                             AUCR,5
P05ANS                            AN0SEL,5
P05D                              IOP0,5
P05OE                             OEP0,5
P05PD                             PDP0,5
P05PU                             PUP0,5
P06ANS                            AN0SEL,6
P06D                              IOP0,6
P06OE                             OEP0,6
P06PD                             PDP0,6
P06PU                             PUP0,6
P0HCON                            PUP0
P10ANS                            AN1SEL,0
P10D                              IOP1,0
P10OE                             OEP1,0
P10PD                             PDP1,0
P10PU                             PUP1,0
P11ANS                            AN1SEL,1
P11D                              IOP1,1
P11DV                             AUCR,2
P11OE                             OEP1,1
P11PD                             PDP1,1
P11PU                             PUP1,1
P12ANS                            AN1SEL,2
P12D                              IOP1,2
P12OE                             OEP1,2
P12PD                             PDP1,2
P12PU                             PUP1,2
P13ANS                            AN1SEL,3
P13D                              IOP1,3
P13OE                             OEP1,3
P13PD                             PDP1,3
P13PU                             PUP1,3
P13SP                             AUCR,4
P14ANS                            AN1SEL,4
P14D                              IOP1,4
P14OE                             OEP1,4
P14PD                             PDP1,4
P14PU                             PUP1,4
P15ANS                            AN1SEL,5
P15D                              IOP1,5
P15OE                             OEP1,5
P15PD                             PDP1,5
P15PU                             PUP1,5
P16ANS                            AN1SEL,6
P16D                              IOP1,6
P16OE                             OEP1,6
P16PD                             PDP1,6
P16PU                             PUP1,6
P1HCON                            PUP1
PC0                               PCL,0
PC1                               PCL,1
PC2                               PCL,2
PC3                               PCL,3
PC4                               PCL,4
PC5                               PCL,5
PC6                               PCL,6
PC7                               PCL,7
PD                                MCR,4
PMODE0                            PWM0DE,3
PMODE1                            PWM1DE,3
PMOS1ON                           AUCR,1
PWM0DE0                           PWM0DE,0
PWM0DE1                           PWM0DE,1
PWM0DE2                           PWM0DE,2
PWM0INV                           PWM0DE,4
PWM0OE                            T0CR,6
PWM1DE0                           PWM1DE,0
PWM1DE1                           PWM1DE,1
PWM1DE2                           PWM1DE,2
PWM1INV                           PWM1DE,4
PWM1OE                            T1CR,6
RESS0                             ADCR1,3
SPDSL                             AUCR,6
STATUS                            PFLAG
STBH                              OSCM,4
STBL                              OSCM,5
T0C0                              T0CNT,0
T0C1                              T0CNT,1
T0C2                              T0CNT,2
T0C3                              T0CNT,3
T0C4                              T0CNT,4
T0C5                              T0CNT,5
T0C6                              T0CNT,6
T0C7                              T0CNT,7
T0DATA0                           T0DATA,0
T0DATA1                           T0DATA,1
T0DATA2                           T0DATA,2
T0DATA3                           T0DATA,3
T0DATA4                           T0DATA,4
T0DATA5                           T0DATA,5
T0DATA6                           T0DATA,6
T0DATA7                           T0DATA,7
T0IE                              INTE0,0
T0IF                              VREFH,0
T0LOAD0                           T0LOAD,0
T0LOAD1                           T0LOAD,1
T0LOAD2                           T0LOAD,2
T0LOAD3                           T0LOAD,3
T0LOAD4                           T0LOAD,4
T0LOAD5                           T0LOAD,5
T0LOAD6                           T0LOAD,6
T0LOAD7                           T0LOAD,7
T0PR0                             T0CR,0
T0PR1                             T0CR,1
T0PR2                             T0CR,2
T0PTS0                            T0CR,3
T0PTS1                            T0CR,4
T1C0                              T1CNT,0
T1C1                              T1CNT,1
T1C2                              T1CNT,2
T1C3                              T1CNT,3
T1C4                              T1CNT,4
T1C5                              T1CNT,5
T1C6                              T1CNT,6
T1C7                              T1CNT,7
T1DATA0                           T1DATA,0
T1DATA1                           T1DATA,1
T1DATA2                           T1DATA,2
T1DATA3                           T1DATA,3
T1DATA4                           T1DATA,4
T1DATA5                           T1DATA,5
T1DATA6                           T1DATA,6
T1DATA7                           T1DATA,7
T1IE                              INTE0,1
T1IF                              VREFH,1
T1LOAD0                           T1LOAD,0
T1LOAD1                           T1LOAD,1
T1LOAD2                           T1LOAD,2
T1LOAD3                           T1LOAD,3
T1LOAD4                           T1LOAD,4
T1LOAD5                           T1LOAD,5
T1LOAD6                           T1LOAD,6
T1LOAD7                           T1LOAD,7
T1PR0                             T1CR,0
T1PR1                             T1CR,1
T1PR2                             T1CR,2
T1PTS0                            T1CR,3
T1PTS1                            T1CR,4
TC0EN                             T0CR,7
TC1EN                             T1CR,7
TO                                MCR,5
VRS0                              ADCR1,0
VRS1                              ADCR1,1
VRS2                              ADCR1,2
Z                                 PFLAG,2

Errors   :     0
Warnings :     0 reported,     0 suppressed
Messages :     0 reported,     0 suppressed

