<?xml version="1.0" encoding="utf-8" standalone="yes"?>
<!--mcu reg config -->
<!--add mc32p64 @2013.06.19-->
<!--add mc32e22 @2013.03.13-->
<!--fixed mc30xx Frmsys SP & A items @2012.12.13-->
<!--expand other chips as mc20p10,mc10p01b,mc10p11b,mc20p801,mc10p02,mc20p38,mc20p04 @2012.10.25 -->
<!--expand evchip addr to 32bit @2012.10.25 -->
<WinScope Name="confige" Version="1.04" Author="Alen.LV" Date="2018-04-27">
  <MCUS>
    <MCU name="MC30P6080" type="RISC14" id="0x6080">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x004f" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="P0" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="KBIM" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTECON" addr="0x0E" />
        <reg name="INTFLAG" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="DDR0" addr="0x45" />
        <reg name="DDR1" addr="0x46" />
        <reg name="PWMCR" addr="0x48" />
        <reg name="T1DAT1" addr="0x49" />
        <reg name="T1DAT2" addr="0x4A" />
        <reg name="TM0CR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DAT0" addr="0x4F" />
      </regs>
    </MCU>
    <MCU name="MC30P6220(试用版)" type="RISC14" id="0x6220">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x004f" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="GPR0" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR1" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="KBIM" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTECON" addr="0x0E" />
        <reg name="INTFLAG" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="TM0CR" addr="0x4B" />
      </regs>
    </MCU>
        <MCU name="MC30P6230" type="RISC14" id="0x6230">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x004f" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="GPR0" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR1" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="KBIM" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="DDR1" addr="0x46" />
        <reg name="TM0CR" addr="0x4B" />
      </regs>
    </MCU>
    <MCU name="MC30P6260" type="RISC14" id="0x6260">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x01ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x004f" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="GPR0" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR1" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="KBIM" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="DDR1" addr="0x46" />
        <reg name="TM0CR" addr="0x4B" />
      </regs>
    </MCU>
        <MCU name="MC30P6201" type="RISC14" id="0x6201">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x007f" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <reg_bank_cfg Bank_Flag="true" Bank_Addr="0x0063" Bank_Posit="0x0005"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0006" Osccal_USER_OPT4="0x0207" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x60" />
        <reg name="T0CNT" addr="0x61" />
        <reg name="PCL" addr="0x62" />
        <reg name="STATUS" addr="0x63" />
        <reg name="FSR" addr="0x64" />
        <reg name="P0" addr="0x65" />
        <reg name="P1" addr="0x66" />
        <reg name="P2" addr="0x67" />
        <reg name="MCR" addr="0x68" />
        <reg name="T0CR" addr="0x69" />
        <reg name="TMRCR" addr="0x6A" />
        <reg name="PCLATH" addr="0x6B" />
        <reg name="INTE1" addr="0x6C" />
        <reg name="INTF1" addr="0x6D" />
        <reg name="INTE0" addr="0x6E" />
        <reg name="INTF0" addr="0x6F" />
        <reg name="CMPCR0" addr="0x70" />
        <reg name="CMPCR1" addr="0x71" />
        <reg name="PUCON1" addr="0x72" />
        <reg name="PDCONL" addr="0x73" />
        <reg name="ODCON" addr="0x74" />
        <reg name="DDR0" addr="0x75" />
        <reg name="DDR1" addr="0x76" />
        <reg name="DDR2" addr="0x77" />
        <reg name="T1DATA" addr="0x78" />
        <reg name="T1DATB" addr="0x79" />
        <reg name="T1DATC" addr="0x7A" />
        <reg name="PWM1CR" addr="0x7B" />
        <reg name="T2DATAH" addr="0x7C" />
        <reg name="T2DATAL" addr="0x7D" />
        <reg name="T2DATBH" addr="0x7E" />
        <reg name="T2DATBL" addr="0x7F" />
        
        <reg2 name="PUCON0" addr="0x70" bank="0x01"/>
        <reg2 name="PDCONH" addr="0x71" bank="0x01"/>
        <reg2 name="PMOD" addr="0x73" bank="0x01"/>
        <reg2 name="P0ADCR" addr="0x74" bank="0x01"/>
        <reg2 name="T1CR" addr="0x78" bank="0x01"/>
        <reg2 name="T1CNT" addr="0x79" bank="0x01"/>
        <reg2 name="T1LOAD" addr="0x7A" bank="0x01"/>
        <reg2 name="T2CR" addr="0x7B" bank="0x01"/>
        <reg2 name="T2LOADH" addr="0x7C" bank="0x01"/>
        <reg2 name="T2LOADL" addr="0x7D" bank="0x01"/>
        <reg2 name="P0KBCR" addr="0x7E" bank="0x01"/>
        <reg2 name="P1KBCR" addr="0x7F" bank="0x01"/>
      </regs>
    </MCU>
   <MCU name="MC30P6240" type="RISC14" id="0x6240">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x004f" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x2"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="P0" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR0" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="P1KBCR" addr="0x09" />
        <reg name="PUDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="P0KBCR" addr="0x40" />
        <reg name="T0CR" addr="0x41" />
        <reg name="T1DATD" addr="0x42" />
        <reg name="CMPCR" addr="0x43" />
        <reg name="INTF1" addr="0x44" />
        <reg name="DDR0" addr="0x45" />
        <reg name="DDR1" addr="0x46" />
        <reg name="PWMCR1" addr="0x47" />
        <reg name="PWMCR0" addr="0x48" />
        <reg name="T1DATB" addr="0x49" />
        <reg name="T1DATC" addr="0x4A" />
        <reg name="TM0CR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
      </regs>
    </MCU>
    <MCU name="MC30P6250" type="RISC14" id="0x6250">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x0057" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="GPR1" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR0" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="P1KBCR" addr="0x09" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="T1DATD" addr="0x42" />
        <reg name="DDR1" addr="0x46" />
        <reg name="PWM1CR1" addr="0x47" />
        <reg name="PWM1CR0" addr="0x48" />
        <reg name="T1DATB" addr="0x49" />
        <reg name="T1DATC" addr="0x4A" />
        <reg name="TM0CR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
        <reg name="CMPCR0" addr="0x50" />
        <reg name="CMPCR1" addr="0x51" />
        <reg name="CMPCR2" addr="0x52" />
      </regs>
    </MCU>
        <MCU name="MC30P6310" type="RISC14" id="0x6310">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x0057" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="flase" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="GPR1" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR0" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="P1KBCR" addr="0x09" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="T1DATD" addr="0x42" />
        <reg name="DDR1" addr="0x46" />
        <reg name="PWM1CR1" addr="0x47" />
        <reg name="PWM1CR0" addr="0x48" />
        <reg name="T1DATB" addr="0x49" />
        <reg name="T1DATC" addr="0x4A" />
        <reg name="TM0CR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
        <reg name="CMPCR0" addr="0x50" />
        <reg name="CMPCR1" addr="0x51" />
        <reg name="CMPCR2" addr="0x52" />
      </regs>
      <OPTIONS>
			<DOPBIT0>
				<address>0x8000</address>		
			  <default>
					  <annotation>默认</annotation>
						<bit>BIT[7:0]</bit>
						<A10000101>必须烧写为25</A10000101>
				</default>
			</DOPBIT0>
			<DOPBIT1>
			    <address>0x8001</address>
			    <default>
			    <annotation>默认</annotation>
			    <bit>BIT[7:0]</bit>
			    <A10010000>必须烧写为90</A10010000>	
			    </default>
			</DOPBIT1>
			<UOPBIT0>
			    <address>0x8002</address>
				  <VLVRS>
				  <annotation>LVR复位电压选择</annotation>
				  <bit>BIT[2:0]</bit>	
				  <A101>2.7V</A101>		 	
				  <A000>LVR关闭</A000>	
				  <A001>1.8V</A001>	
					<A010>2.0V</A010>		
				 </VLVRS> 
				 <RPUSEL>
				 	  <annotation>端口上拉电阻选择位</annotation>
				 	 <bit>BIT[3:3]</bit>
				 	 <A0>90KΩ</A0>
					 <A1>20KΩ</A1>
				 </RPUSEL>
				 <WDTM>
				    <annotation>看门狗使能</annotation>
					<bit>BIT[4:4]</bit>
					<A0>WDT始终关闭</A0>
					<A1>WDT始终开启</A1>
				 </WDTM>		
				 <RSTEN>
				 	    <annotation>RST外部复位使能</annotation>
				 	    <bit>BIT[5:5]</bit>
				 	    <A0>P13用作IO口</A0>
					    <A1>P13用作复位脚</A1>  
				 </RSTEN>
				 <SMTEN>
				 	    <annotation>施密特功能使能</annotation>
				 	    <bit>BIT[6:6]</bit>
				 	    <A0>SMT功能关闭</A0>
					    <A1>SMT功能开启</A1> 
				 </SMTEN>
				 <SMTSEL>
				 	    <annotation>施密特阈值选择位</annotation>
				 	    <bit>BIT[7:7]</bit>
				 	    <A0>2.0V/0.8V</A0>
					    <A1>0.8VDD/0.2VDD</A1> 
				 </SMTSEL>	
				 <WDTT>
				    <annotation>看门狗WDT溢出时间选择</annotation>
				    <bit>BIT[10:8]</bit>
					<A100>TWDT=72ms</A100>
					<A101>TWDT=288ms</A101>
					<A110>TWDT=4.5ms</A110>
					<A111>TWDT=18ms</A111>
				 </WDTT>
				 <default>
					<annotation>固定为1</annotation>
					<bit>BIT[11:11]</bit>
					<A1>必须烧写为1</A1>	
				 </default>
			</UOPBIT0>	
		  <UOPBIT1>
			    <address>0x8003</address>	    
			    <default>
					<annotation>默认</annotation>
					<bit>BIT[7:0]</bit>
					<A00000000>必须烧写为1</A00000000>	
				</default>
			</UOPBIT1>   
			<UOPBIT2>
				<address>0x8004</address>		
				<default>
					  <annotation>默认 </annotation>
					  <bit>BIT[2:0]</bit> 
					  <A000>必须烧写为0</A000>
				</default>
				<HIRCFS>
				    <annotation>HIRC振荡器频率选择位</annotation>	
				   <bit>BIT[5:3]</bit>
				   <A000>16M</A000>
				   <A001>8M</A001>
				   <A010>4M</A010>
				   <A011>2M</A011>
				   <A100>1M</A100>
				</HIRCFS>	
			  <default>
					  <annotation>默认 </annotation>
					  <bit>BIT[6:6]</bit> 
					  <A0>必须烧写为0</A0>
				</default>
				<FCPUS>
					    <annotation>CPU时钟频率选择位</annotation>	
					  <bit>BIT[7:7]</bit> 
					  <A0>FCPU=FOSC/2</A0>
					  <A1>FCPU=FOSC/4</A1>
				</FCPUS>	
				<default>
					    <annotation>默认</annotation>
					  <bit>BIT[13:8]</bit> 
					  <A001111>必须烧写为10</A001111>
				</default>
			</UOPBIT2> 
			<UOPBIT3>
				 <address>0x8005</address>	
			 <OSCM>
				     <annotation>振荡器模式选择</annotation>
				 <bit>BIT[3:0]</bit>
				 <A1100>双时钟模式：内部HIRC+内部LIRC</A1100> 
				 <A0101>双时钟模式：内部HIRC+外部32K晶体振荡器</A0101> 
				 <A1111>单时钟模式：内部高频RC振荡器HIRC</A1111> 
			 </OSCM>		
			 <default>
					    <annotation>默认 </annotation>
					  <bit>BIT[7:4]</bit> 
					  <A1010>必须烧写为01</A1010>
				</default>
				<DRVS0>
				 	    <annotation>施密特功能使能</annotation>
				 	    <bit>BIT[10:8]</bit>
				 	    <A001>15mA/20mA</A001>
				 </DRVS0>
				 <DRVS1>
				 	    <annotation>施密特功能使能</annotation>
				 	    <bit>BIT[11:11]</bit>
					    <A1>15mA/20mA</A1> 
				 </DRVS1>
			 </UOPBIT3> 
	 		</OPTIONS>
    </MCU>
       <MCU name="MC30P6270" type="RISC14" id="0x6270">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x0057" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="GPR1" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR0" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="P1KBCR" addr="0x09" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="DDR1" addr="0x46" />
        <reg name="TM0CR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
        <reg name="LVDCR0" addr="0x50" />
        <reg name="LVDCR1" addr="0x51" />
        <reg name="LVDCR2" addr="0x52" />
      </regs>
    </MCU>
    <MCU name="MC30P6280" type="RISC14" id="0x6280">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x0057" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="P1" addr="0x06" />
        <reg name="MCR" addr="0x08" />
        <reg name="P1KBCR" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="DDR1" addr="0x46" />
        <reg name="TMRCR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
      </regs>
      <OPTIONS>
			<DOPBIT0>
				<address>0x8000</address>		
				<PAGE>
			    <annotation>ROM烧录模式设置</annotation>
			    <bit>BIT[2:0]</bit>
				<A011>0.5K容量MTP模式，第1次烧录</A011>
				<A010>0.5K容量MTP模式，第2次烧录</A010>
				<A101>1K容量OTP模式</A101>
			 </PAGE>	
			</DOPBIT0>
			<DOPBIT1>
			    <address>0x8001</address>
			    <default>
			    <annotation>默认</annotation>
			    <bit>BIT[13:8]</bit>
			    <A000000>必须烧写为1A</A000000>	
			    </default>
			</DOPBIT1>
			<UOPBIT0>
			    <address>0x8002</address>
				  <VLVRS>
				  <annotation>LVR复位电压选择</annotation>
				  <bit>BIT[2:0]</bit>		 	
				  <A000>LVR关闭</A000>	
				  <A001>1.8V</A001>	
					<A010>2.0V</A010>		
					<A101>2.7V</A101>	
					<A111>3.6V</A111>			
				 </VLVRS> 
				 <OSCM>
				 	  <annotation>系统主时钟源选择</annotation>
				 	 <bit>BIT[3:3]</bit>
				 	 <A0>FOSC=内部低频RC振荡器时钟FLIRC</A0>
					 <A1>FOSC=内部高频RC振荡器时钟FHIRC的后分频时钟</A1>
				 </OSCM>
				 <SMTSEL>
				    <annotation>端口施密特阈值选择</annotation>
					<bit>BIT[4:4]</bit>
					<A0>2.0V/0.8V</A0>
					<A1>0.8VDD/0.2VDD</A1>
				 </SMTSEL>		
				 <WDTM>
				 	    <annotation>WDT模式设置</annotation>
				 	    <bit>BIT[5:5]</bit>
				 	    <A0>WDT始终关闭</A0>
					    <A1>WDT始终开启</A1>  
				 </WDTM>
				 <IOHS>
				 	    <annotation>端口驱动拉电流选择</annotation>
				 	    <bit>BIT[6:6]</bit>
				 	    <A0>限流驱动</A0>
					    <A1>正常驱动</A1> 
				 </IOHS>
				 <default>
			    <annotation>默认:代码加密选项</annotation>
			    <bit>BIT[7:7]</bit>
			    <A1>时钟来自PAD</A1>	
			    </default>	 
			</UOPBIT0>	
		  <UOPBIT1>
			    <address>0x8003</address>	    
				 <HIRCDS>
				  <annotation>HIRC后分频输出选择</annotation>
				  <bit>BIT[2:0]</bit>		 	
					<A010>FHIRC/32</A010>		
					<A011>FHIRC/16</A011>		
					<A100>FHIRC/8</A100>		
					<A101>FHIRC/4</A101>	
					<A110>FHIRC/2</A110>		
					<A111>FHIRC/1</A111>			
				 </HIRCDS> 
				 <MCUSEL>
				 	  <annotation>芯片模式选择</annotation>
				 	 <bit>BIT[3:3]</bit>
				 	 <A0>C编译模式</A0>
					 <A1>汇编模式</A1>
				 </MCUSEL>
				 <WDTT>
				 	  <annotation>WDT溢出时间选择</annotation>
				 	 <bit>BIT[5:4]</bit>
				 	 <A00>TWDT=58ms</A00>
					 <A01>TWDT=230ms</A01>
					 <A10>TWDT=3.6ms</A10>
					 <A11>TWDT=14ms</A11>
				 </WDTT>
	 			 <SMTEN>
		 	    <annotation>端口输入施密特设置</annotation>
		 	    <bit>BIT[6:6]</bit>
		 	    <A0>输入SMT功能关闭</A0>
			    <A1>输入SMT功能开启</A1> 
				 </SMTEN>
			</UOPBIT1>  
	 		</OPTIONS>
    </MCU>  
    <MCU name="MC30P6290" type="RISC14" id="0x6290">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x005F" chip_ramSize="0x0060" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00005F" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
			<firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="P1" addr="0x06" />
        <reg name="MCR" addr="0x08" />
        <reg name="P1KBCR" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="DDR1" addr="0x46" />
        <reg name="TMRCR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
        <reg name="LBCCR0" addr="0x58" />
        <reg name="LBCCR1" addr="0x59" />
        <reg name="LBCSR" addr="0x5A" />
      </regs>
      <OPTIONS>
			<DOPBIT0>
				<address>0x8000</address>		
				<PAGE>
			    <annotation>ROM烧录模式设置</annotation>
			    <bit>BIT[2:0]</bit>
				<A011>0.5K容量MTP模式，第1次烧录</A011>
				<A010>0.5K容量MTP模式，第2次烧录</A010>
				<A101>1K容量OTP模式</A101>
			 </PAGE>	
			 <default>
			    <annotation>默认</annotation>
			    <bit>BIT[7:3]</bit>
			    <A10000>必须烧写为1A</A10000>	
			 </default>
			</DOPBIT0>
			<DOPBIT1>
			    <address>0x8001</address>
			    <default>
			    <annotation>默认</annotation>
			    <bit>BIT[7:0]</bit>
			    <A10000000>必须烧写为80H</A10000000>	
			    </default>
			</DOPBIT1>
			<UOPBIT0>
			    <address>0x8002</address>
				  <VLVRS>
				  <annotation>LVR复位电压选择</annotation>
				  <bit>BIT[2:0]</bit>
				  <A001>3.6V</A001>			 	
				  <A000>LVR关闭</A000>	
					<A011>2.2V</A011>		
					<A101>2.7V</A101>	
					<A111>1.8V</A111>			
				 </VLVRS> 
				 <OSCM>
				 	  <annotation>系统主时钟源选择</annotation>
				 	 <bit>BIT[3:3]</bit>
				 	 <A0>FOSC=内部低频RC振荡器时钟FLIRC</A0>
					 <A1>FOSC=内部高频RC振荡器时钟FHIRC的后分频时钟</A1>
				 </OSCM>
				 <SMTVS>
				    <annotation>端口施密特阈值选择</annotation>
					<bit>BIT[4:4]</bit>
					<A0>2.0V/0.8V</A0>
					<A1>0.8VDD/0.2VDD</A1>
				 </SMTVS>		
				 <WDTM>
				 	    <annotation>WDT模式设置</annotation>
				 	    <bit>BIT[5:5]</bit>
				 	    <A0>WDT始终关闭</A0>
					    <A1>WDT始终开启</A1>  
				 </WDTM>
				 <IOHS>
				 	    <annotation>端口源电流输出选择</annotation>
				 	    <bit>BIT[6:6]</bit>
				 	    <A0>源电流限流输出</A0>
					    <A1>源电流正常输出</A1> 
				 </IOHS>
				 <default>
			    <annotation>默认:代码加密选项</annotation>
			    <bit>BIT[7:7]</bit>
			    <A1>时钟来自PAD</A1>	
			    </default>	 
			</UOPBIT0>	
		  <UOPBIT1>
			    <address>0x8003</address>	    
				 <HIRCDS>
				  <annotation>HIRC后分频输出选择</annotation>
				  <bit>BIT[2:0]</bit>		 	
					<A010>FHIRC/32</A010>		
					<A011>FHIRC/16</A011>		
					<A100>FHIRC/8</A100>		
					<A101>FHIRC/4</A101>	
					<A110>FHIRC/2</A110>		
					<A111>FHIRC/1</A111>			
				 </HIRCDS> 
				 <MCUSEL>
				 	  <annotation>芯片模式选择</annotation>
				 	 <bit>BIT[3:3]</bit>
				 	 <A0>C编译模式</A0>
					 <A1>汇编模式</A1>
				 </MCUSEL>
				 <WDTT>
				 	  <annotation>WDT溢出时间选择</annotation>
				 	 <bit>BIT[5:4]</bit>
				 	 <A00>TWDT=72ms</A00>
					 <A01>TWDT=288ms</A01>
					 <A10>TWDT=4.5ms</A10>
					 <A11>TWDT=18ms</A11>
				 </WDTT>
	 			 <SMTEN>
		 	    <annotation>端口输入施密特设置</annotation>
		 	    <bit>BIT[6:6]</bit>
		 	    <A0>输入SMT功能无效</A0>
			    <A1>输入SMT功能有效</A1> 
				 </SMTEN>
				 <default>
		 	    <annotation>LBC模块测试使能设置</annotation>
		 	    <bit>BIT[7:7]</bit>
		 	    <A0>固定：测试模式关闭</A0>
				 </default>
			</UOPBIT1>  
			<DOPBIT2>
			    <address>0x8004</address>
			    <default>
			    <annotation>默认</annotation>
			    <bit>BIT[3:0]</bit>
			    <A1000>必须烧写为1A</A1000>	
			    </default>
			</DOPBIT2>			
			<DOPBIT3>
			    <address>0x8005</address>
			    <default>
			    <annotation>默认</annotation>
			    <bit>BIT[3:0]</bit>
			    <A1000>必须烧写为1A</A1000>	
			    </default>
			</DOPBIT3>				
	 		</OPTIONS>
    </MCU> 
    <MCU name="MC30P8160" type="RISC14" id="0x8160">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x006f" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
			<firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="P1" addr="0x06" />
        <reg name="MCR" addr="0x08" />
        <reg name="T0CR" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="PWM1CR0" addr="0x50" />
        <reg name="PWM1CR1" addr="0x51" />
        <reg name="PWM1CR2" addr="0x52" />
        <reg name="DDR1" addr="0x56" />
        <reg name="TMRCR" addr="0x58" />
        <reg name="T1CR" addr="0x59" />
        <reg name="T1CNT" addr="0x5A" />
        <reg name="T1LOAD" addr="0x5B" />
        <reg name="T1DATA" addr="0x5C" />
        <reg name="T1DATB" addr="0x5D" />
        <reg name="T1DATC" addr="0x5E" />
        <reg name="T1DATD" addr="0x5F" />
        <reg name="T2CR" addr="0x60" />
        <reg name="T2CNTH" addr="0x61" />
        <reg name="T2CNTL" addr="0x62" />
        <reg name="T2LOADH" addr="0x63" />
        <reg name="T2LOADL" addr="0x64" />
        <reg name="P1KBCR" addr="0x65" />
        <reg name="P1ADCR" addr="0x67" />
        <reg name="CMPCR0" addr="0x68" />
        <reg name="CMPCR1" addr="0x69" />
        <reg name="CMPCR2" addr="0x6A" />
        <reg name="TKCR0" addr="0x6B" />
        <reg name="TKCR1" addr="0x6C" />
        <reg name="TKCR2" addr="0x6D" />
        <reg name="TKCNTH" addr="0x6E" />
        <reg name="TKCNTL" addr="0x6F" />
      </regs>
      <OPTIONS>
			<DOPBIT0>
				<address>0x8000</address>		
				<default>
			    <annotation>ROM烧录模式设置</annotation>
			    <bit>BIT[2:0]</bit>
			    <A101>1K容量OTP模式</A101>
					<A011>0.5K容量MTP模式，第1次烧录</A011>
					<A010>0.5K容量MTP模式，第2次烧录</A010>
			 </default>	
			 <default>
			    <annotation>默认</annotation>
			    <bit>BIT[7:3]</bit>
			    <A10000>必须烧写为1A</A10000>	
			    </default>
			</DOPBIT0>
			<DOPBIT1>
			    <address>0x8001</address>
			    <default>
			    <annotation>默认</annotation>
			    <bit>BIT[13:8]</bit>
			    <A000000>必须烧写为1A</A000000>	
			    </default>
			</DOPBIT1>
			<UOPBIT0>
			    <address>0x8002</address>
				  <VLVRS>
				  <annotation>LVR复位电压选择</annotation>
				  <bit>BIT[2:0]</bit>		 	
				  <A000>LVR关闭</A000>	
				  <A001>1.8V</A001>	
					<A010>2.0V</A010>			
					<A101>2.7V</A101>	
					<A111>3.6V</A111>			
				 </VLVRS> 
				 <OSCM>
				 	  <annotation>系统主时钟源选择</annotation>
				 	 <bit>BIT[3:3]</bit>
				 	 <A0>FOSC=内部低频RC振荡器时钟FLIRC</A0>
					 <A1>FOSC=内部高频RC振荡器时钟FHIRC的后分频时钟</A1>
				 </OSCM>
				 <SMTVS>
				    <annotation>端口施密特阈值选择</annotation>
					<bit>BIT[4:4]</bit>
					<A0>2.0V/0.8V</A0>
					<A1>0.8VDD/0.2VDD</A1>
				 </SMTVS>		
				 <WDTM>
				 	    <annotation>WDT模式设置</annotation>
				 	    <bit>BIT[5:5]</bit>
				 	    <A0>WDT始终关闭</A0>
					    <A1>WDT始终开启</A1>  
				 </WDTM>
				 <IOHS>
				 	    <annotation>端口驱动拉电流选择</annotation>
				 	    <bit>BIT[6:6]</bit>
				 	    <A0>限流驱动</A0>
					    <A1>正常驱动</A1> 
				 </IOHS>
				 <default>
			    <annotation>默认:代码加密选项</annotation>
			    <bit>BIT[7:7]</bit>
			    <A1>时钟来自PAD</A1>	
			    </default>	 
			</UOPBIT0>	
		  <UOPBIT1>
			    <address>0x8003</address>	    
				 <HIRCDS>
				  <annotation>HIRC后分频输出选择</annotation>
				  <bit>BIT[2:0]</bit>		 	
					<A010>FHIRC/32</A010>		
					<A011>FHIRC/16</A011>		
					<A100>FHIRC/8</A100>		
					<A101>FHIRC/4</A101>	
					<A110>FHIRC/2</A110>		
					<A111>FHIRC/1</A111>			
				 </HIRCDS> 
				 <MCUSEL>
				 	  <annotation>芯片模式选择</annotation>
				 	 <bit>BIT[3:3]</bit>
				 	 <A0>C编译模式</A0>
					 <A1>汇编模式</A1>
				 </MCUSEL>
				 <WDTT>
				 	  <annotation>WDT溢出时间选择</annotation>
				 	 <bit>BIT[5:4]</bit>
				 	 <A00>TWDT=72ms</A00>
					 <A01>TWDT=288ms</A01>
					 <A10>TWDT=4.5ms</A10>
					 <A11>TWDT=18ms</A11>
				 </WDTT>
	 			 <SMTEN>
		 	    <annotation>端口输入施密特设置</annotation>
		 	    <bit>BIT[6:6]</bit>
		 	    <A0>输入SMT功能无效</A0>
			    <A1>输入SMT功能有效</A1> 
				 </SMTEN>
				 <RSTEN>
		 	    <annotation>RST外部复位端口设置</annotation>
		 	    <bit>BIT[7:7]</bit>
		 	    <A0>P14为输入/输出脚</A0>
			    <A1>P14为外部复位脚</A1> 
				 </RSTEN>
			</UOPBIT1>  
			<DOPBIT2>
			    <address>0x8001</address>
			    <default>
			    <annotation>默认</annotation>
			    <bit>BIT[13:8]</bit>
			    <A000000>必须烧写为1A</A000000>	
			    </default>
			</DOPBIT2>
			<DOPBIT3>
			    <address>0x8001</address>
			    <default>
				  <annotation>模拟电压输出选择</annotation>
				  <bit>BIT[2:0]</bit>		 	
					<A111>不输出</A111>		
					<A000>不输出</A000>		
					<A001>LDO 从SDO输出</A001>		
					<A010>BG从SDO输出</A010>			
				 </default> 
				 <default>
		 	    <annotation>模拟电压输出管脚选择</annotation>
		 	    <bit>BIT[3:3]</bit>
		 	    <A1>P15</A1> 
		 	    <A0>P13</A0>
				 </default>
			</DOPBIT3>
	 		</OPTIONS>
    </MCU> 
    <MCU name="MC32P7030" type="RISC16" id="0x7011">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x00ff" chip_ramSize="0x100" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="A" value="0xff" describe="A state reg" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="HIBYTE" addr="0x082" />
        <reg name="FSR0" addr="0x083" />
        <reg name="FSR1" addr="0x084" />
        <reg name="PFLAG" addr="0x086" />
        <reg name="ANSEL" addr="0x0AE" />
        <reg name="VREF" addr="0x0AF" />
        <reg name="ADCR" addr="0x0B1" />
        <reg name="ADRH" addr="0x0B2" />
        <reg name="ADRL" addr="0x0B3" />
        <reg name="OEP0" addr="0x0B8" />
        <reg name="PEDGE" addr="0x0BF" />
        <reg name="OEP4" addr="0x0C4" />
        <reg name="OEP5" addr="0x0C5" />
        <reg name="INTF" addr="0x0C8" />
        <reg name="INTE" addr="0x0C9" />
        <reg name="OSCM" addr="0x0CA" />
        <reg name="WDTR" addr="0x0CC" />
        <reg name="T0D" addr="0x0CD" />
        <reg name="PCL" addr="0x0CE" />
        <reg name="PCH" addr="0x0CF" />
        <reg name="IOP0" addr="0x0D0" />
        <reg name="IOP4" addr="0x0D4" />
        <reg name="IOP5" addr="0x0D5" />
        <reg name="TXCR" addr="0x0D8" />
        <reg name="T0CR" addr="0x0DA" />
        <reg name="T0C" addr="0x0DB" />
        <reg name="T1CR" addr="0x0DC" />
        <reg name="T1C" addr="0x0DD" />
        <reg name="T1D" addr="0x0DE" />
        <reg name="STKP" addr="0x0DF" />
        <reg name="PUP0" addr="0x0E0" />
        <reg name="PUP4" addr="0x0E4" />
        <reg name="PUP5" addr="0x0E5" />
        <reg name="INDF" addr="0x0E7" />
        <reg name="STK3L" addr="0x0F8" />
        <reg name="STK3H" addr="0x0F9" />
        <reg name="STK2L" addr="0x0FA" />
        <reg name="STK2H" addr="0x0FB" />
        <reg name="STK1L" addr="0x0FC" />
        <reg name="STK1H" addr="0x0FD" />
        <reg name="STK0L" addr="0x0FE" />
        <reg name="STK0H" addr="0x0FF" />
      </regs>
    </MCU>
    <MCU name="MC32P7031" type="RISC16" id="0x7031">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x00ff" chip_ramSize="0x100" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>       
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="A" value="0xff" describe="A state reg" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="HIBYTE" addr="0x082" />
        <reg name="FSR0" addr="0x083" />
        <reg name="FSR1" addr="0x084" />
        <reg name="PFLAG" addr="0x086" />
        <reg name="ANSEL" addr="0x0AE" />
        <reg name="VREF" addr="0x0AF" />
        <reg name="ADCR" addr="0x0B1" />
        <reg name="ADRH" addr="0x0B2" />
        <reg name="ADRL" addr="0x0B3" />
        <reg name="OEP0" addr="0x0B8" />
        <reg name="PEDGE" addr="0x0BF" />
        <reg name="OEP4" addr="0x0C4" />
        <reg name="OEP5" addr="0x0C5" />
        <reg name="INTF" addr="0x0C8" />
        <reg name="INTE" addr="0x0C9" />
        <reg name="OSCM" addr="0x0CA" />
        <reg name="WDTR" addr="0x0CC" />
        <reg name="T0D" addr="0x0CD" />
        <reg name="PCL" addr="0x0CE" />
        <reg name="PCH" addr="0x0CF" />
        <reg name="IOP0" addr="0x0D0" />
        <reg name="IOP4" addr="0x0D4" />
        <reg name="IOP5" addr="0x0D5" />
        <reg name="TXCR" addr="0x0D8" />
        <reg name="T0CR" addr="0x0DA" />
        <reg name="T0C" addr="0x0DB" />
        <reg name="T1CR" addr="0x0DC" />
        <reg name="T1C" addr="0x0DD" />
        <reg name="T1D" addr="0x0DE" />
        <reg name="STKP" addr="0x0DF" />
        <reg name="PUP0" addr="0x0E0" />
        <reg name="PUP4" addr="0x0E4" />
        <reg name="PUP5" addr="0x0E5" />
        <reg name="INDF" addr="0x0E7" />
        <reg name="T2CR" addr="0x0EC" />
        <reg name="T2C" addr="0x0ED" />
        <reg name="T2D" addr="0x0EE" />
        <reg name="STK3L" addr="0x0F8" />
        <reg name="STK3H" addr="0x0F9" />
        <reg name="STK2L" addr="0x0FA" />
        <reg name="STK2H" addr="0x0FB" />
        <reg name="STK1L" addr="0x0FC" />
        <reg name="STK1H" addr="0x0FD" />
        <reg name="STK0L" addr="0x0FE" />
        <reg name="STK0H" addr="0x0FF" />
      </regs>
     </MCU>
	 <MCU name="MC35P7040" type="RISC16" id="0x7040">
	      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x00ff" chip_ramSize="0x100" />
	      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0000ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7fffe0" ev_optionCnt="0x1f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
	      <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x9E97" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x07c0" Osccal_USER_OPT2="0x0000" 
	      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0500" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
	      <syss>
	        <sys name="PC" value="0x0000" describe="A state reg" />
	        <sys name="SP" value="0xff" describe="SP pointer reg" />
	        <sys name="A" value="0xff" describe="A state reg" />
	        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
	        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
	        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
	        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
	      </syss>
	      <option>
	        <CP>abcddd</CP>
	      </option>
	      <regs>
	        <reg name="HIBYTE" addr="0x0082" />
	        <reg name="FSR0" addr="0x0083" />
	        <reg name="FSR1" addr="0x0084" />
	        <reg name="PFLAG" addr="0x0086" />
	        <reg name="P4CON" addr="0x00ae" />
	        <reg name="VREFCR" addr="0x00af" />
	        <reg name="ADM" addr="0x00b1" />
	        <reg name="ADB" addr="0x00b2" />
	        <reg name="ADR" addr="0x00b3" />
	        <reg name="ADT" addr="0x00b4" />
	        <reg name="OEP0" addr="0x00b8" />
	        <reg name="EINTCR" addr="0x00bf" />
	        <reg name="OEP4" addr="0x00c4" />
	        <reg name="OEP5" addr="0x00c5" />
	        <reg name="INTF" addr="0x00c8" />
	        <reg name="INTE" addr="0x00c9" />
	        <reg name="OSCM" addr="0x00ca" />
	        <reg name="WDTCR" addr="0x00cc" />
	        <reg name="T0LDR" addr="0x00cd" />
	        <reg name="PCL" addr="0x00ce" />
	        <reg name="PCH" addr="0x00cf" />
	        <reg name="IOP0" addr="0x00d0" />
	        <reg name="IOP4" addr="0x00d4" />
	        <reg name="IOP5" addr="0x00d5" />
	        <reg name="TMRCR" addr="0x00d8" />
	        <reg name="T0CR" addr="0x00da" />
	        <reg name="T0CNT" addr="0x00db" />
	        <reg name="T1CR" addr="0x00dc" />
	        <reg name="T1CNT" addr="0x00dd" />
	        <reg name="T1LDR" addr="0x00de" />
	        <reg name="MCR" addr="0x00df" />
	        <reg name="PUP0" addr="0x00e0" />
	        <reg name="PUP4" addr="0x00e4" />
	        <reg name="PUP5" addr="0x00e5" />
	        <reg name="INDF" addr="0x00e7" />
	        <reg name="STKR3L" addr="0x00f8" />
	        <reg name="STKR3H" addr="0x00f9" />
	        <reg name="STKR2L" addr="0x00fa" />
	        <reg name="STKR2H" addr="0x00fb" />
	        <reg name="STKR1L" addr="0x00fc" />
	        <reg name="STKR1H" addr="0x00fd" />
	        <reg name="STKR0L" addr="0x00fe" />
	        <reg name="STKR0H" addr="0x00ff" />
	      </regs>                    
	  </MCU>
     <MCU name="MC35P7050" type="RISC16" id="0x7050">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x00ff" chip_ramSize="0x100" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0000ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7fffe0" ev_optionCnt="0x1f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x9E97" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x07c0" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0500" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="HIBYTE" addr="0x0082" />
        <reg name="FSR0" addr="0x0083" />
        <reg name="FSR1" addr="0x0084" />
        <reg name="PFLAG" addr="0x0086" />
        <reg name="P4CON" addr="0x00ae" />
        <reg name="VREFCR" addr="0x00af" />
        <reg name="ADM" addr="0x00b1" />
        <reg name="ADB" addr="0x00b2" />
        <reg name="ADR" addr="0x00b3" />
        <reg name="ADT" addr="0x00b4" />
        <reg name="OEP0" addr="0x00b8" />
        <reg name="EINTCR" addr="0x00bf" />
        <reg name="OEP4" addr="0x00c4" />
        <reg name="OEP5" addr="0x00c5" />
        <reg name="INTF" addr="0x00c8" />
        <reg name="INTE" addr="0x00c9" />
        <reg name="OSCM" addr="0x00ca" />
        <reg name="WDTCR" addr="0x00cc" />
        <reg name="T0LDR" addr="0x00cd" />
        <reg name="PCL" addr="0x00ce" />
        <reg name="PCH" addr="0x00cf" />
        <reg name="IOP0" addr="0x00d0" />
        <reg name="IOP4" addr="0x00d4" />
        <reg name="IOP5" addr="0x00d5" />
        <reg name="TMRCR" addr="0x00d8" />
        <reg name="T0CR" addr="0x00da" />
        <reg name="T0CNT" addr="0x00db" />
        <reg name="T1CR" addr="0x00dc" />
        <reg name="T1CNT" addr="0x00dd" />
        <reg name="T1LDR" addr="0x00de" />
        <reg name="MCR" addr="0x00df" />
        <reg name="PUP0" addr="0x00e0" />
        <reg name="PUP4" addr="0x00e4" />
        <reg name="PUP5" addr="0x00e5" />
        <reg name="INDF" addr="0x00e7" />
        <reg name="STKR3L" addr="0x00f8" />
        <reg name="STKR3H" addr="0x00f9" />
        <reg name="STKR2L" addr="0x00fa" />
        <reg name="STKR2H" addr="0x00fb" />
        <reg name="STKR1L" addr="0x00fc" />
        <reg name="STKR1H" addr="0x00fd" />
        <reg name="STKR0L" addr="0x00fe" />
        <reg name="STKR0H" addr="0x00ff" />
      </regs>                    
          </MCU>
    <MCU name="MC35P7041(试用版)" type="RISC16" id="0x7041">	
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x00ff" chip_ramSize="0x100" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
     <!-- <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x0640" Osccal_Time_Standard="0x3840" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x2100" Osccal_USER_OPT2="0x0200" 
      	Osccal_USER_OPT3="0x0238" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/> -->
      <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x9E97" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x2100" Osccal_USER_OPT2="0x0200" 
      	Osccal_USER_OPT3="0x0238" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="A" value="0xff" describe="A state reg" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="HIBYTE" addr="0x082" />
        <reg name="FSR0" addr="0x083" />
        <reg name="FSR1" addr="0x084" />
        <reg name="PFLAG" addr="0x086" />
        <reg name="ZEROTR" addr="0x08E" />
        <reg name="OSCCAL" addr="0x08F" />
        <reg name="WKCR0" addr="0x0A0" />
        <reg name="WKCR5" addr="0x0A5" />
        <reg name="ADIOS0" addr="0x0AD" />              
        <reg name="ADIOS1" addr="0x0AE" />
	<reg name="ADIOS2" addr="0x0AF" />
        <reg name="ADCR0" addr="0x0B1" />
        <reg name="ADCR1" addr="0x0B2" />
        <reg name="ADRH" addr="0x0B3" />
        <reg name="ADRL" addr="0x0B4" />
        <reg name="ADCR2" addr="0x0B5" />
        <reg name="OEP0" addr="0x0B8" />
	<reg name="EINTCR" addr="0x0BF" />
	<reg name="OEP4" addr="0x0C4" />
        <reg name="OEP5" addr="0x0C5" />
        <reg name="INTF" addr="0x0C8" />
	<reg name="INTE" addr="0x0C9" />
	<reg name="OSCM" addr="0x0CA" />
	<reg name="WDTCR" addr="0x0CC" />
	<reg name="T1LDR" addr="0x0CD" />	
	<reg name="PCL" addr="0x0CE" />
	<reg name="PCH" addr="0x0CF" />
	<reg name="IOP0" addr="0x0D0" />
	<reg name="IOP4" addr="0x0D4" />
	<reg name="IOP5" addr="0x0D5" />        
        <reg name="T0CR" addr="0x0D8" />
        <reg name="T0CNT" addr="0x0D9" />
        <reg name="T1CR" addr="0x0DA" />
        <reg name="T1CNT" addr="0x0DB" />
        <reg name="BUZCR" addr="0x0DC" />
        <reg name="MCR" addr="0x0DF" />
        <reg name="PUP0" addr="0x0E0" />
        <reg name="PUP4" addr="0x0E4" />
        <reg name="PUP5" addr="0x0E5" />
        <reg name="INDF" addr="0x0E7" />
        <reg name="PWMCR0" addr="0x0E8" />
        <reg name="PWMCR1" addr="0x0E9" />
        <reg name="PWMCNT" addr="0x0EA" />
        <reg name="PWMADT" addr="0x0EB" />
        <reg name="PWMBDT" addr="0x0EC" />
        <reg name="PWMCDT" addr="0x0ED" />
        <reg name="PWMPD" addr="0x0EE" />
        <reg name="STKR0L" addr="0x0F0" />
        <reg name="STKR0H" addr="0x0F1" />
        <reg name="STKR1L" addr="0x0F2" />
        <reg name="STKR1H" addr="0x0F3" />
        <reg name="STKR2L" addr="0x0F4" />
        <reg name="STKR2H" addr="0x0F5" />
        <reg name="STKR3L" addr="0x0F6" />
        <reg name="STKR3H" addr="0x0F7" />
        <reg name="STKR4L" addr="0x0F8" />
        <reg name="STKR4H" addr="0x0F9" />
        <reg name="STKR5L" addr="0x0FA" />
        <reg name="STKR5H" addr="0x0FB" />
        <reg name="STKR6L" addr="0x0FC" />
        <reg name="STKR6H" addr="0x0FD" />
        <reg name="STKR7L" addr="0x0FE" />
        <reg name="STKR7H" addr="0x0FF" />
      </regs>
     </MCU>
    <MCU name="MC35P6021(试用版)" type="RISC16" id="0x6021">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x00ff" chip_ramSize="0x100" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x9E97" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x2100" Osccal_USER_OPT2="0x0200" 
      	Osccal_USER_OPT3="0x0238" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="A" value="0xff" describe="A state reg" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="HIBYTE" addr="0x082" />
        <reg name="FSR0" addr="0x083" />
        <reg name="FSR1" addr="0x084" />
        <reg name="PFLAG" addr="0x086" />
        <reg name="OSCCAL" addr="0x08F" />
        <reg name="WKCR0" addr="0x0A0" />
        <reg name="WKCR5" addr="0x0A5" />
        <reg name="OEP0" addr="0x0B8" />
	<reg name="EINTCR" addr="0x0BF" />
	<reg name="OEP4" addr="0x0C4" />
        <reg name="OEP5" addr="0x0C5" />
        <reg name="INTF" addr="0x0C8" />
	<reg name="INTE" addr="0x0C9" />
	<reg name="OSCM" addr="0x0CA" />
	<reg name="WDTCR" addr="0x0CC" />
	<reg name="T1LDR" addr="0x0CD" />	
	<reg name="PCL" addr="0x0CE" />
	<reg name="PCH" addr="0x0CF" />
	<reg name="IOP0" addr="0x0D0" />
	<reg name="IOP4" addr="0x0D4" />
	<reg name="IOP5" addr="0x0D5" />        
        <reg name="T0CR" addr="0x0D8" />
        <reg name="T0CNT" addr="0x0D9" />
        <reg name="T1CR" addr="0x0DA" />
        <reg name="T1CNT" addr="0x0DB" />
        <reg name="BUZCR" addr="0x0DC" />
        <reg name="MCR" addr="0x0DF" />
        <reg name="PUP0" addr="0x0E0" />
        <reg name="PUP4" addr="0x0E4" />
        <reg name="PUP5" addr="0x0E5" />
        <reg name="INDF" addr="0x0E7" />
        <reg name="PWMCR0" addr="0x0E8" />
        <reg name="PWMCR1" addr="0x0E9" />
        <reg name="PWMCNT" addr="0x0EA" />
        <reg name="PWMADT" addr="0x0EB" />
        <reg name="PWMBDT" addr="0x0EC" />
        <reg name="PWMCDT" addr="0x0ED" />
        <reg name="PWMPD" addr="0x0EE" />
        <reg name="STKR0L" addr="0x0F0" />
        <reg name="STKR0H" addr="0x0F1" />
        <reg name="STKR1L" addr="0x0F2" />
        <reg name="STKR1H" addr="0x0F3" />
        <reg name="STKR2L" addr="0x0F4" />
        <reg name="STKR2H" addr="0x0F5" />
        <reg name="STKR3L" addr="0x0F6" />
        <reg name="STKR3H" addr="0x0F7" />
        <reg name="STKR4L" addr="0x0F8" />
        <reg name="STKR4H" addr="0x0F9" />
        <reg name="STKR5L" addr="0x0FA" />
        <reg name="STKR5H" addr="0x0FB" />
        <reg name="STKR6L" addr="0x0FC" />
        <reg name="STKR6H" addr="0x0FD" />
        <reg name="STKR7L" addr="0x0FE" />
        <reg name="STKR7H" addr="0x0FF" />
      </regs>
     </MCU>
    <MCU name="MC32P7212" type="RISC16" id="0x7212">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0fff" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x801fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="IOP2" addr="0x198" />
        <reg name="OEP2" addr="0x199" />
        <reg name="PUP2" addr="0x19A" />
        <reg name="IOP3" addr="0x19C" />
        <reg name="OEP3" addr="0x19D" />
        <reg name="PUP3" addr="0x19E" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A4" />
        <reg name="T1CNT" addr="0x1A5" />
        <reg name="T1LOAD" addr="0x1A6" />
        <reg name="T1DATA" addr="0x1A7" />
        <reg name="LXTCR" addr="0x1A8" />
        <reg name="PUMP" addr="0x1AD" />
        <reg name="OSCM" addr="0x1AE" />
        <reg name="LVDCR" addr="0x1AF" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADCR2" addr="0x1B2" />
        <reg name="TPSC" addr="0x1B3" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRM" addr="0x1B5" />
        <reg name="ADRL" addr="0x1B6" />
        <reg name="LCDCR0" addr="0x1B8" />
        <reg name="LCDCR1" addr="0x1B9" />
        <reg name="LCDIOS1" addr="0x1BA" />
        <reg name="LCDIOS2" addr="0x1BB" />
        <reg name="LCDDS2" addr="0x1C0" />
        <reg name="LCDDS3" addr="0x1C1" />
        <reg name="LCDDS4" addr="0x1C2" />
        <reg name="LCDDS5" addr="0x1C3" />
        <reg name="LCDDS6" addr="0x1C4" />
        <reg name="LCDDS7" addr="0x1C5" />
        <reg name="LCDDS8" addr="0x1C6" />
        <reg name="LCDDS9" addr="0x1C7" />
        <reg name="LCDDS10" addr="0x1C8" />
        <reg name="LCDDS11" addr="0x1C9" />
        <reg name="LCDDS12" addr="0x1CA" />
        <reg name="LCDDS13" addr="0x1CB" />
      </regs>
    </MCU>    
    <MCU name="MC32P7311" type="RISC16" id="0x7311">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="DRVCR" addr="0x18C" />
        <reg name="KBCR" addr="0x18E" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" />
        <reg name="T0CR" addr="0x198" />
        <reg name="T0CNT" addr="0x199" />
        <reg name="T0LOAD" addr="0x19A" />
        <reg name="T0DATA" addr="0x19B" />
        <reg name="T1CR" addr="0x19C" />
        <reg name="T1CNT" addr="0x19D" />
        <reg name="T1LOAD" addr="0x19E" />
        <reg name="T1DATA" addr="0x19F" />
        <reg name="T2CR" addr="0x1A0" />
        <reg name="T2CNT" addr="0x1A1" />
        <reg name="T2LOAD" addr="0x1A2" />
        <reg name="T2DATA" addr="0x1A3" />
        <reg name="T3CR" addr="0x1A4" />
        <reg name="T3CNT" addr="0x1A5" />
        <reg name="T3LOAD" addr="0x1A6" />
        <reg name="PWM0DE" addr="0x1A8" />
        <reg name="PWM1DE" addr="0x1A9" />
        <reg name="PWM2DE" addr="0x1AA" />
        <reg name="PWMCR0" addr="0x1AC" />
        <reg name="PWMCR1" addr="0x1AD" />
        <reg name="OSCM" addr="0x1AE" />
        <reg name="LVDCR" addr="0x1AF" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADCR2" addr="0x1B2" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
        <reg name="ANSEL0" addr="0x1B6" />
        <reg name="ANSEL1" addr="0x1B7" />
        <reg name="VBGCAL" addr="0x1F8" />
        <reg name="OSCCALH" addr="0x1FB" />
        <reg name="OSCCALL" addr="0x1FC" />
      </regs>
    </MCU>
        <MCU name="MC32P7331" type="RISC16" id="0x7331">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0000ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <!-- 0x790B -->
     <!--
     some evchip addr to Osccal_Adjust @2018.02.27 
     Osccal_Mode 功能开启总开关；		Osccal_Nop_num nup个数，用于osccal_S19的个数检测时间校准0x0640
     （Osccal_Nop_num，修改为osccal_7041工程的结束地址加1  20180829）
     Osccal_Time_Standard 校准标准，跟CPU及nop个数有关，如内部RC 16M、2T，8M，0.125us*1600，200us	。200*72=0x3840 	
     Osccal_USER_OPT0、1、2、3、4 配置初始值，其中包含内部RC、加密位、tadj、分频、16M等
     Osccal_Osc_bits osccal校准值的位数			Osccal_Osc_posit 02：OPT2；00：起始位置		Osccal_Osc_range 校准的范围 *1/100					
     -->
      <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0020" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x000B" Osccal_Osc_posit="0x0100" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="DRVCR" addr="0x18C" />
        <reg name="P1KBCR" addr="0x18E" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" />
        <reg name="T0CR" addr="0x198" />
        <reg name="T0CNT" addr="0x199" />
        <reg name="T0LOAD" addr="0x19A" />
        <reg name="T0DATA" addr="0x19B" />
        <reg name="T1CR" addr="0x19C" />
        <reg name="T1CNT" addr="0x19D" />
        <reg name="T1LOAD" addr="0x19E" />
        <reg name="T1DATA" addr="0x19F" />
        <reg name="T2CR" addr="0x1A0" />
        <reg name="T2CNT" addr="0x1A1" />
        <reg name="T2LOAD" addr="0x1A2" />
        <reg name="T2DATA" addr="0x1A3" />
        <reg name="T3CR" addr="0x1A4" />
        <reg name="T3CNT" addr="0x1A5" />
        <reg name="T3LOAD" addr="0x1A6" />
        <reg name="PWM0DR" addr="0x1A8" />
        <reg name="PWM1DR" addr="0x1A9" />
        <reg name="PWM2DR" addr="0x1AA" />
        <reg name="PWMCR0" addr="0x1AC" />
        <reg name="PWMCR1" addr="0x1AD" />
        <reg name="OSCMR" addr="0x1AE" />
        <reg name="LVDCR" addr="0x1AF" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADCR2" addr="0x1B2" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
        <reg name="ADIOS0" addr="0x1B6" />
        <reg name="ADIOS1" addr="0x1B7" />
        <reg name="PMOD" addr="0x1BC" />
        <reg name="PWMCR3" addr="0x1BD" />
        <reg name="PWMCR2" addr="0x1BE" />
        <reg name="HIRCCR" addr="0x1BF" />
        <reg name="OSCCALH" addr="0x1FB" />
        <reg name="OSCCALL" addr="0x1FC" />
      </regs>
    </MCU>
    <MCU name="MC32P7351" type="RISC16" id="0x7351">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0000ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <!-- 0x790B -->
     <!--
     some evchip addr to Osccal_Adjust @2018.02.27 
     Osccal_Mode 功能开启总开关；		Osccal_Nop_num nup个数，用于osccal_S19的个数检测时间校准0x0640
     （Osccal_Nop_num，修改为osccal_7041工程的结束地址加1  20180829）
     Osccal_Time_Standard 校准标准，跟CPU及nop个数有关，如内部RC 16M、2T，8M，0.125us*1600，200us	。200*72=0x3840 	
     Osccal_USER_OPT0、1、2、3、4 配置初始值，其中包含内部RC、加密位、tadj、分频、16M等
     Osccal_Osc_bits osccal校准值的位数			Osccal_Osc_posit 02：OPT2；00：起始位置		Osccal_Osc_range 校准的范围 *1/100					
     -->
     <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0008" Osccal_USER_OPT2="0x0006" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0010" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0300" Osccal_Osc_range="0x1"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="DRVCR" addr="0x18C" />
        <reg name="PFRCCR" addr="0x18D" />
        <reg name="P1KBCR" addr="0x18E" />
        <reg name="PFRCCAL" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" />
        <reg name="T0CR" addr="0x198" />
        <reg name="T0CNT" addr="0x199" />
        <reg name="T0LOAD" addr="0x19A" />
        <reg name="T0DATA" addr="0x19B" />
        <reg name="T1CR" addr="0x19C" />
        <reg name="T1CNT" addr="0x19D" />
        <reg name="T1LOAD" addr="0x19E" />
        <reg name="T1DATA" addr="0x19F" />
        <reg name="T2CR" addr="0x1A0" />
        <reg name="T2CNT" addr="0x1A1" />
        <reg name="T2LOAD" addr="0x1A2" />
        <reg name="T2DATA" addr="0x1A3" />
        <reg name="T3CR" addr="0x1A4" />
        <reg name="T3CNT" addr="0x1A5" />
        <reg name="T3LOAD" addr="0x1A6" />
        <reg name="PWM0DR" addr="0x1A8" />
        <reg name="PWM1DR" addr="0x1A9" />
        <reg name="PWM2DR" addr="0x1AA" />
        <reg name="PWMCR0" addr="0x1AC" />
        <reg name="PWMCR1" addr="0x1AD" />
        <reg name="OSCMR" addr="0x1AE" />
        <reg name="LVDCR" addr="0x1AF" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADCR2" addr="0x1B2" />
        <reg name="OSADJCR" addr="0x1B3" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
        <reg name="ADIOS0" addr="0x1B6" />
        <reg name="ADIOS1" addr="0x1B7" />
        <reg name="PMOD" addr="0x1BC" />
        <reg name="PWMCR3" addr="0x1BD" />
        <reg name="PWMCR2" addr="0x1BE" />
        <reg name="PFRCAUX" addr="0x1FB" />
        <reg name="HIRCCAL" addr="0x1FC" />
      </regs>
      <OPTIONS>
				<DOPBIT0>
					<address>0x8000</address>		
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[13:0]</bit>
							<A00000000000000>默认为0</A00000000000000>
					</default>
				</DOPBIT0>
								<DOPBIT1>
				    <address>0x8001</address>
				    <WDTM>
					    <annotation>WDT模式设置</annotation>
							<bit>BIT[1:0]</bit>
							<A00>WDT始终关闭</A00>
							<A01>WDT低功耗模式下关闭</A01>
							<A11>WDT始终开启</A11>
					 </WDTM>
					 <RSTEN>
				 	    <annotation>RST外部复位设置</annotation>
				 	    <bit>BIT[2:2]</bit>
				 	    <A0>P13为输入/输出脚</A0>
					    <A1>P13为外部复位脚</A1>  
					 </RSTEN>	
					 <LVRMD>
				 	    <annotation>LVR模式设置</annotation>
				 	    <bit>BIT[3:3]</bit>
				 	    <A0>LVR始终开启</A0>
					    <A1>LVR在运行模式下开启，在低功耗模式下关闭</A1>  
					 </LVRMD>	
					 <VLVRS>
						  <annotation>低压复位电压选择位</annotation>
						  <bit>BIT[6:4]</bit>		
						  <A001>3.6V</A001>	
							<A011>2.7V</A011>	
							<A100>2.4V</A100>			
							<A110>2.0V</A110>
							<A111>1.8V</A111>				
					 </VLVRS> 
					 <WDTT>
					    <annotation>WDT溢出时间选择</annotation>
					    <bit>BIT[10:8]</bit>
					    <A000>4096ms</A000>
							<A001>2048ms</A001>
							<A010>1024ms</A010>
							<A100>256ms</A100>
							<A110>64ms</A110>
							<A111>16ms</A111>
					 </WDTT>	
					 <default>
						  <annotation>默认</annotation>
							<bit>BIT[12:11]</bit>
							<A11>默认为11</A11>
					 </default>
					 <default>
						  <annotation>默认</annotation>
							<bit>BIT[13:13]</bit>
							<A0>默认为0</A0>
					 </default> 
				</DOPBIT1>
				<UOPBIT0>
				    <address>0x8002</address>
					  <FCPUS>
						  <annotation>高频时钟下FCPU分频选择</annotation>
						  <bit>BIT[2:0]</bit>		
						  <A000>FCPU=FHOSC/256</A000>	 	
						  <A001>FCPU=FHOSC/128</A001>	
							<A010>FCPU=FHOSC/64</A010>		
							<A011>FCPU=FHOSC/32</A011>	
							<A100>FCPU=FHOSC/16</A100>				
							<A101>FCPU=FHOSC/8</A101>	
							<A110>FCPU=FHOSC/4</A110>		
					 </FCPUS> 
					 <SMTVS>
					 	  <annotation>端口施密特阈值选择</annotation>
					 	 <bit>BIT[3:3]</bit>
					 	 <A0>0.8V/2.0V</A0>
						 <A1>0.2VDD/0.8VDD</A1>
					 </SMTVS>
					 <XTLEN>
					    <annotation>系统低频时钟源选择</annotation>
						<bit>BIT[4:4]</bit>
						<A0>外部32768Hz晶体振荡器时钟FXTAL</A0>
						<A1>内部低频RC振荡器时钟FLIRC</A1>
					 </XTLEN>			 
				</UOPBIT0>	
			  <UOPBIT1>
				  <address>0x8003</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[13:0]</bit>
							<A00000000000000>默认为0</A00000000000000>
					</default>
				</UOPBIT1>  
				<UOPBIT2>
					<address>0x8004</address>		
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[4:0]</bit>
							<A00000>默认为0</A00000>
					</default>
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[10:8]</bit>
							<A111>默认为111</A111>
					</default>
				</UOPBIT2> 
				<UOPBIT3>
					 <address>0x8005</address>		
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[13:0]</bit>
							<A00000001000000>默认为40</A00000001000000>
					</default>
				</UOPBIT3>
				<UOPBIT4>
					 <address>0x8006</address>		
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[13:0]</bit>
							<A00000001000000>默认为40</A00000001000000>
					</default>
				</UOPBIT4>
				<UOPBIT5>
					 <address>0x8007</address>		
					 <default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A01000000>默认为40</A01000000>
					</default>
					<SPDS>
					    <annotation>端口输出驱动管开关速度选择</annotation>
							<bit>BIT[9:8]</bit>
							<A00>低速输出</A00>
							<A11>高速输出</A11>
					 </SPDS>
				</UOPBIT5>
				<UOPBIT6>
					 <address>0x8008</address>		
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[13:0]</bit>
							<A00000000010000>默认为10</A00000000010000>
					</default>
				</UOPBIT6>
				<UOPBIT7>
					 <address>0x8009</address>		
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[13:0]</bit>
							<A00000000000000>默认为0</A00000000000000>
					</default>
				</UOPBIT7>
				<UOPBIT8>
					 <address>0x800A</address>		
					 <default>
						  <annotation>默认</annotation>
							<bit>BIT[3:0]</bit>
							<A1111>默认为F</A1111>
					</default>
				</UOPBIT8>
				<UOPBIT9>
					 <address>0x800B</address>		
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[13:0]</bit>
							<A00101100000000>默认为A00</A00101100000000>
					</default>
				</UOPBIT9>
	 		</OPTIONS>
    </MCU>
    <MCU name="MC32P7541(试用版)" type="RISC16" id="0x7541">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x05ff" chip_romSize="0x0600" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8005ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7fffe0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" />
        <reg name="T0EFR" addr="0x198" />
        <reg name="T1EFR" addr="0x199" />
        <reg name="T2CR" addr="0x19C" />
        <reg name="T2CNT" addr="0x19D" />
        <reg name="T2LOAD" addr="0x19E" />
        <reg name="T1DATB" addr="0x19F" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A4" />
        <reg name="T1CNT" addr="0x1A5" />
        <reg name="T1LOAD" addr="0x1A6" />
        <reg name="T1DATA" addr="0x1A7" />
        <reg name="AUCR" addr="0x1A8" />
        <reg name="VOP0" addr="0x1AA" />
        <reg name="VOP1" addr="0x1AB" />
        <reg name="OSCM" addr="0x1AE" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADIOS0" addr="0x1B2" />
        <reg name="ADIOS1" addr="0x1B3" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
      </regs>
    </MCU>
    <MCU name="MC32P8141" type="RISC16" id="0x8141">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <osccal_cfg  Osccal_Mode="true" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0080" Osccal_USER_OPT2="0x0760" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x000A" Osccal_Osc_posit="0x0300" Osccal_Osc_range="0x2"/>
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="LVDCR" addr="0x18D" />
        <reg name="DRVCR" addr="0x18E" />   
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" /> 
        <reg name="T0CR" addr="0x198" />
        <reg name="T0CNTH" addr="0x199" />
        <reg name="T0CNTL" addr="0x19A" />
        <reg name="T0LOADH" addr="0x19B" />         
        <reg name="T0LOADL" addr="0x19C" />
  
        <reg name="PFRCCR" addr="0x19E" />
        <reg name="PFRCCAL" addr="0x19F" />
        <reg name="T1CR" addr="0x1A0" />
        <reg name="T1CNT" addr="0x1A1" />
        <reg name="T1LOAD" addr="0x1A2" />
        <reg name="T1DATA" addr="0x1A3" />
        <reg name="PWM1CR0" addr="0x1A4" />
        <reg name="PWM1CR1" addr="0x1A5" />
        <reg name="PWM1CR2" addr="0x1A6" />     
        <reg name="T2CR" addr="0x1A8" />
        <reg name="T2CNT" addr="0x1A9" />
        <reg name="T2LOAD" addr="0x1AA" />
        <reg name="T2DATA" addr="0x1AB" />
        <reg name="T2DATB" addr="0x1AC" />
        <reg name="PWM2CR" addr="0x1AD" />

        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADRH" addr="0x1B2" />
        <reg name="ADRL" addr="0x1B3" />
        <reg name="OSADJCR" addr="0x1B4" />
        <reg name="P0ADCR" addr="0x1B5" />
        <reg name="P1ADCR" addr="0x1B6" />
        <reg name="P0KBCR" addr="0x1B7" />
        <reg name="TKCR0" addr="0x1B8" />
        <reg name="TKCR1" addr="0x1B9" />
        <reg name="TKCNTH" addr="0x1BA" />
        <reg name="TKCNTL" addr="0x1BB" />
      </regs>
    </MCU>
    <MCU name="MC32F7333(试用版)" type="RISC16" id="0x7333">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x1fff" chip_romSize="0x2000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
			<mtp_cfg MTP_Flag="true" EEPROM_Flag="false" EEPROM_AddrFirst="0x00c000" EEPROM_Size="0x0100"/> 
			<firmware_cfg Firm_Ver="0x0500" Firm_name="ICE_SLIN_Fv5.0.srec"/>     
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="OSCM" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="KBCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
	<reg name="PDP1" addr="0x197" />
 	<reg name="IOP2" addr="0x198" />
 	<reg name="OEP2" addr="0x199" />
	 <reg name="PUP2" addr="0x19A" />
	 <reg name="PDP2" addr="0x19B" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A8" />
        <reg name="T1CNTH" addr="0x1A9" />
        <reg name="T1CNTL" addr="0x1AA" />
         <reg name="T1LOADH" addr="0x1AB" />
         <reg name="T1LOADL" addr="0x1AC" />
         <reg name="T1DATAH" addr="0x1AD" />
         <reg name="T1DATAL" addr="0x1AE" />
        <reg name="IICCR" addr="0x1B0" />
        <reg name="IICSR" addr="0x1B1" />
        <reg name="IICDR" addr="0x1B2" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="ADIOS0" addr="0x1BC" />
        <reg name="ADIOS1" addr="0x1BD" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="T2CR" addr="0x1C0" />
         <reg name="T2CNTH" addr="0x1C1" />
         <reg name="T2CNTL" addr="0x1C2" />
         <reg name="T2LOADH" addr="0x1C3" />
         <reg name="T2LOADL" addr="0x1C4" />
         <reg name="T3CR" addr="0x1C5" />
         <reg name="T3CNT" addr="0x1C6" />
         <reg name="T3LOAD" addr="0x1C7" />
         <reg name="SCON" addr="0x1C8" />
         <reg name="SBUF" addr="0x1C9" />
         <reg name="SADDR" addr="0x1CA" />
         <reg name="SADEN" addr="0x1CB" />
      </regs>
    </MCU>
    <MCU name="MC32F7341(试用版)" type="RISC16" id="0x7341">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x7ff" chip_romSize="0x2000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="false" EEPROM_AddrFirst="0x00c000" EEPROM_Size="0x0100"/>
      <firmware_cfg Firm_Ver="0x0500" Firm_name="ICE_SLIN_Fv5.0.srec"/>     
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="P1KBCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
				<reg name="PDP1" addr="0x197" />
 				<reg name="IOP2" addr="0x198" />
 				<reg name="OEP2" addr="0x199" />
			  <reg name="PUP2" addr="0x19A" />
	 			<reg name="PDP2" addr="0x19B" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A8" />
        <reg name="T1CNTH" addr="0x1A9" />
        <reg name="T1CNTL" addr="0x1AA" />
         <reg name="T1LOADH" addr="0x1AB" />
         <reg name="T1LOADL" addr="0x1AC" />
         <reg name="T1DATAH" addr="0x1AD" />
         <reg name="T1DATAL" addr="0x1AE" />
        <reg name="IICCR" addr="0x1B0" />
        <reg name="IICSR" addr="0x1B1" />
        <reg name="IICDR" addr="0x1B2" />
        <reg name="EECR" addr="0x1B4" />
        <reg name="EEPR" addr="0x1B5" />
        <reg name="EEAR" addr="0x1B6" />
        <reg name="EEDR" addr="0x1B7" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="ADIOS0" addr="0x1BC" />
        <reg name="ADIOS1" addr="0x1BD" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="T2CR" addr="0x1C0" />
         <reg name="T2CNTH" addr="0x1C1" />
         <reg name="T2CNTL" addr="0x1C2" />
         <reg name="T2LOADH" addr="0x1C3" />
         <reg name="T2LOADL" addr="0x1C4" />
         <reg name="T3CR" addr="0x1C5" />
         <reg name="T3CNT" addr="0x1C6" />
         <reg name="T3LOAD" addr="0x1C7" />
         <reg name="SCON" addr="0x1C8" />
         <reg name="SBUF" addr="0x1C9" />
         <reg name="SADDR" addr="0x1CA" />
         <reg name="SADEN" addr="0x1CB" />
      </regs>
  </MCU>
    <MCU name="MC32F7342(试用版)" type="RISC16" id="0x7342">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0xfff" chip_romSize="0x2000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="false" EEPROM_AddrFirst="0x00c000" EEPROM_Size="0x0100"/>
      <firmware_cfg Firm_Ver="0x0500" Firm_name="ICE_SLIN_Fv5.0.srec"/>     
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="P1KBCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
				<reg name="PDP1" addr="0x197" />
 				<reg name="IOP2" addr="0x198" />
 				<reg name="OEP2" addr="0x199" />
			  <reg name="PUP2" addr="0x19A" />
	 			<reg name="PDP2" addr="0x19B" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A8" />
        <reg name="T1CNTH" addr="0x1A9" />
        <reg name="T1CNTL" addr="0x1AA" />
         <reg name="T1LOADH" addr="0x1AB" />
         <reg name="T1LOADL" addr="0x1AC" />
         <reg name="T1DATAH" addr="0x1AD" />
         <reg name="T1DATAL" addr="0x1AE" />
        <reg name="IICCR" addr="0x1B0" />
        <reg name="IICSR" addr="0x1B1" />
        <reg name="IICDR" addr="0x1B2" />
        <reg name="EECR" addr="0x1B4" />
        <reg name="EEPR" addr="0x1B5" />
        <reg name="EEAR" addr="0x1B6" />
        <reg name="EEDR" addr="0x1B7" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="ADIOS0" addr="0x1BC" />
        <reg name="ADIOS1" addr="0x1BD" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="T2CR" addr="0x1C0" />
         <reg name="T2CNTH" addr="0x1C1" />
         <reg name="T2CNTL" addr="0x1C2" />
         <reg name="T2LOADH" addr="0x1C3" />
         <reg name="T2LOADL" addr="0x1C4" />
         <reg name="T3CR" addr="0x1C5" />
         <reg name="T3CNT" addr="0x1C6" />
         <reg name="T3LOAD" addr="0x1C7" />
         <reg name="SCON" addr="0x1C8" />
         <reg name="SBUF" addr="0x1C9" />
         <reg name="SADDR" addr="0x1CA" />
         <reg name="SADEN" addr="0x1CB" />
      </regs>
  </MCU>
    <MCU name="MC32F7343(试用版)" type="RISC16" id="0x7343">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x1fff" chip_romSize="0x2000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="false" EEPROM_AddrFirst="0x00c000" EEPROM_Size="0x0100"/> 
			<firmware_cfg Firm_Ver="0x0500" Firm_name="ICE_SLIN_Fv5.0.srec"/>       
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="P1KBCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
				<reg name="PDP1" addr="0x197" />
 				<reg name="IOP2" addr="0x198" />
 				<reg name="OEP2" addr="0x199" />
			  <reg name="PUP2" addr="0x19A" />
	 			<reg name="PDP2" addr="0x19B" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A8" />
        <reg name="T1CNTH" addr="0x1A9" />
        <reg name="T1CNTL" addr="0x1AA" />
         <reg name="T1LOADH" addr="0x1AB" />
         <reg name="T1LOADL" addr="0x1AC" />
         <reg name="T1DATAH" addr="0x1AD" />
         <reg name="T1DATAL" addr="0x1AE" />
        <reg name="IICCR" addr="0x1B0" />
        <reg name="IICSR" addr="0x1B1" />
        <reg name="IICDR" addr="0x1B2" />
        <reg name="EECR" addr="0x1B4" />
        <reg name="EEPR" addr="0x1B5" />
        <reg name="EEAR" addr="0x1B6" />
        <reg name="EEDR" addr="0x1B7" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="ADIOS0" addr="0x1BC" />
        <reg name="ADIOS1" addr="0x1BD" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="T2CR" addr="0x1C0" />
         <reg name="T2CNTH" addr="0x1C1" />
         <reg name="T2CNTL" addr="0x1C2" />
         <reg name="T2LOADH" addr="0x1C3" />
         <reg name="T2LOADL" addr="0x1C4" />
         <reg name="T3CR" addr="0x1C5" />
         <reg name="T3CNT" addr="0x1C6" />
         <reg name="T3LOAD" addr="0x1C7" />
         <reg name="SCON" addr="0x1C8" />
         <reg name="SBUF" addr="0x1C9" />
         <reg name="SADDR" addr="0x1CA" />
         <reg name="SADEN" addr="0x1CB" />
      </regs>
 	 </MCU>
 	<MCU name="MC32F7071" type="RISC16" id="0x7071">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x1fff" chip_romSize="0x2000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x008000" EEPROM_Size="0x0040"/>
      <firmware_cfg Firm_Ver="0x0600" Firm_name="ICE_SLIN_Fv6.0.srec"/>
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="P1KBCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
				<reg name="PDP1" addr="0x197" />
 				<reg name="IOP2" addr="0x198" />
 				<reg name="OEP2" addr="0x199" />
			  <reg name="PUP2" addr="0x19A" />
	 			<reg name="PDP2" addr="0x19B" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="PWM0CR0" addr="0x1A4" />
        <reg name="PWM0CR1" addr="0x1A5" />        
        <reg name="T1CR" addr="0x1A8" />
        <reg name="T1CNTH" addr="0x1A9" />
        <reg name="T1CNTL" addr="0x1AA" />
         <reg name="T1LOADH" addr="0x1AB" />
         <reg name="T1LOADL" addr="0x1AC" />
         <reg name="T1DATAH" addr="0x1AD" />
         <reg name="T1DATAL" addr="0x1AE" />
        <reg name="HIRCCAL" addr="0x1B3" />
        <reg name="EECR" addr="0x1B4" />
        <reg name="EEMASK" addr="0x1B5" />
        <reg name="EEAR" addr="0x1B6" />
        <reg name="EEDR" addr="0x1B7" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="ADIOS0" addr="0x1BC" />
        <reg name="ADIOS1" addr="0x1BD" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="T2CR" addr="0x1C0" />
         <reg name="T2CNTH" addr="0x1C1" />
         <reg name="T2CNTL" addr="0x1C2" />
         <reg name="T2LOADH" addr="0x1C3" />
         <reg name="T2LOADL" addr="0x1C4" />
         <reg name="T3CR" addr="0x1C5" />
         <reg name="T3CNT" addr="0x1C6" />
         <reg name="T3LOAD" addr="0x1C7" />
         <reg name="T3DATA" addr="0x1C8" />
         <reg name="T3DATB" addr="0x1C9" />
         <reg name="T3DATC" addr="0x1CA" />
         <reg name="PWM3CR" addr="0x1CB" />
      </regs>
  </MCU>
    <MCU name="MC32F7122(试用版)" type="RISC16" id="0x7122">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x1fff" chip_romSize="0x2000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
			<mtp_cfg MTP_Flag="true" EEPROM_Flag="false" EEPROM_AddrFirst="0x00c000" EEPROM_Size="0x0100"/>      
			<firmware_cfg Firm_Ver="0x0500" Firm_name="ICE_SLIN_Fv5.0.srec"/>     
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="OSCM" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="LVDCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
	<reg name="PDP1" addr="0x197" />
 	<reg name="IOP2" addr="0x198" />
 	<reg name="OEP2" addr="0x199" />
	 <reg name="PUP2" addr="0x19A" />
	 <reg name="PDP2" addr="0x19B" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
         <reg name="T1CR" addr="0x1A5" />
        <reg name="T1CNT" addr="0x1A6" />
        <reg name="T1LOAD" addr="0x1A7" />
        <reg name="T2CR" addr="0x1A8" />
        <reg name="T2CNT" addr="0x1A9" />
        <reg name="T2LOAD" addr="0x1AA" />
        <reg name="T2EFR" addr="0x1AC" />
         <reg name="T3CR" addr="0x1AD" />
        <reg name="T3CNT" addr="0x1AE" />
        <reg name="T3LOAD" addr="0x1AF" />
        <reg name="IICCR" addr="0x1B0" />
        <reg name="IICAR" addr="0x1B1" />
        <reg name="IICDR" addr="0x1B2" />
        <reg name="EECR" addr="0x1B4" />
        <reg name="EEMASK" addr="0x1B5" />
        <reg name="EEAR" addr="0x1B6" />
        <reg name="EEDR" addr="0x1B7" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="PPGCR" addr="0x1C0" />
         <reg name="PPGLDH" addr="0x1C1" />
         <reg name="PPGLDL" addr="0x1C2" />
         <reg name="PPGTDL" addr="0x1C3" />
         <reg name="PPGTDB" addr="0x1C4" />
         <reg name="OPACR" addr="0x1C5" />
         <reg name="OPACLR" addr="0x1C6" />
         <reg name="CPCR" addr="0x1C8" />
         <reg name="CPSR" addr="0x1C9" />
         <reg name="CPVR0" addr="0x1CA" />
         <reg name="CPVR1" addr="0x1CB" />
         <reg name="CP0CLR" addr="0x1CC" />        
         <reg name="CP1CLR" addr="0x1CD" />    
         <reg name="CP2CLR" addr="0x1CE" />   
         <reg name="CP3CLR" addr="0x1CF" />         
      </regs>
    </MCU>
       <MCU name="MC32F7132" type="RISC16" id="0x7132">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0fff" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0000ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <!-- 0x790B -->
     <!--
     some evchip addr to Osccal_Adjust @2018.02.27 
     Osccal_Mode 功能开启总开关；		Osccal_Nop_num nup个数，用于osccal_S19的个数检测时间校准0x0640
     （Osccal_Nop_num，修改为osccal_7041工程的结束地址加1  20180829）
     Osccal_Time_Standard 校准标准，跟CPU及nop个数有关，如内部RC 16M、2T，8M，0.125us*1600，200us	。200*72=0x3840 	
     Osccal_USER_OPT0、1、2、3、4 配置初始值，其中包含内部RC、加密位、tadj、分频、16M等
     Osccal_Osc_bits osccal校准值的位数			Osccal_Osc_posit 02：OPT2；00：起始位置		Osccal_Osc_range 校准的范围 *1/100					
     -->
      <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0020" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x000B" Osccal_Osc_posit="0x0100" Osccal_Osc_range="0x1"/>
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="false" EEPROM_AddrFirst="0x008080" EEPROM_Size="0x0100"/>
			<firmware_cfg Firm_Ver="0x0700" Firm_name="ICE_SLIN_Fv7.0.srec"/>
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="LVDCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
	<reg name="PDP1" addr="0x197" />
 	<reg name="IOP2" addr="0x198" />
 	<reg name="OEP2" addr="0x199" />
	 <reg name="PUP2" addr="0x19A" />
	 <reg name="PDP2" addr="0x19B" />
	 <reg name="PWM0CR0" addr="0x19C" />
	 <reg name="PWM0CR1" addr="0x19D" />
	 <reg name="PWM0CR2" addr="0x19E" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
         <reg name="T1CR" addr="0x1A5" />
        <reg name="T1CNT" addr="0x1A6" />
        <reg name="T1LOAD" addr="0x1A7" />
        <reg name="T2CR" addr="0x1A8" />
        <reg name="T2CNT" addr="0x1A9" />
        <reg name="T2LOAD" addr="0x1AA" />
        <reg name="T2EFR" addr="0x1AC" />
         <reg name="T3CR" addr="0x1AD" />
        <reg name="T3CNT" addr="0x1AE" />
        <reg name="T3LOAD" addr="0x1AF" />
        <reg name="IICCR" addr="0x1B0" />
        <reg name="IICAR" addr="0x1B1" />
        <reg name="IICDR" addr="0x1B2" />
        <reg name="EEDRH" addr="0x1B3" />
        <reg name="EECR" addr="0x1B4" />
        <reg name="EEMASK" addr="0x1B5" />
        <reg name="EEAR" addr="0x1B6" />
        <reg name="EEDRL" addr="0x1B7" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="P0ADCR" addr="0x1BC" />
        <reg name="P1ADCR" addr="0x1BD" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="MEFCR" addr="0x1BF" />
        <reg name="PPGCR" addr="0x1C0" />
         <reg name="PPGLDH" addr="0x1C1" />
         <reg name="PPGLDL" addr="0x1C2" />
         <reg name="PPGTDL" addr="0x1C3" />
         <reg name="PPGTDB" addr="0x1C4" />
         <reg name="OPACR" addr="0x1C5" />
         <reg name="OPACLR" addr="0x1C6" />
         <reg name="CPCR0" addr="0x1C8" />
         <reg name="CPSR" addr="0x1C9" />
         <reg name="CPVR0" addr="0x1CA" />
         <reg name="CPVR1" addr="0x1CB" />
         <reg name="CP0CLR" addr="0x1CC" />        
         <reg name="CP1CLR" addr="0x1CD" />    
         <reg name="CP2CLR" addr="0x1CE" />   
         <reg name="CP3CLR" addr="0x1CF" />     
         <reg name="CPCR1" addr="0x1D0" />    
         <reg name="CPCR2" addr="0x1D1" />    
         <reg name="CPDB0" addr="0x1D2" />    
         <reg name="CPDB1" addr="0x1D3" />    
         <reg name="DBGCR" addr="0x1D6" />    
         <reg name="DBGPR" addr="0x1D7" />   
      </regs>
      <OPTIONS>
				<COPT1>
					<address>0x8001</address>		
					<FCPUS>
						  <annotation>高频时钟下FCPU分频选择</annotation>
						  <bit>BIT[6:4]</bit>		
						  <A000>FCPU=FHOSC/2</A000>	 	
						  <A001>FCPU=FHOSC/4</A001>	
							<A010>FCPU=FHOSC/8</A010>		
							<A011>FCPU=FHOSC/16</A011>	
							<A100>FCPU=FHOSC/32</A100>				
							<A101>FCPU=FHOSC/64</A101>	
					 </FCPUS> 
				</COPT1>
				<UOPT1>
				    <address>0x8011</address>
				    <WDTT>
					    <annotation>WDT溢出时间选择</annotation>
							<bit>BIT[2:0]</bit>
							<A010>64ms</A010>
							<A110>2048ms</A110>
					 </WDTT>
					 <HIRCFS>
				 	    <annotation>HIRC振荡频率选择</annotation>
				 	    <bit>BIT[3:3]</bit>
				 	    <A0>FHIRC=16MHz</A0>
					    <A1>FHIRC=32MHz</A1>  
					 </HIRCFS>	
					 <WDTM>
						  <annotation>WDT模式设置</annotation>
						  <bit>BIT[5:4]</bit>		
						  <A00>WDT始终关闭</A00>	 	
						  <A01>WDT在运行模式下开启，在低功耗模式下关闭</A01>	
							<A11>WDT始终开启</A11>				
					 </WDTM> 
					 <default>
				 	    <annotation>IO输出翻转速度选择</annotation>
				 	    <bit>BIT[6:6]</bit>
					    <A1>快速翻转（快开快关）</A1>  
					    <A0>慢速翻转（慢开快关）</A0>
					 </default>	
					 <RSTEN>
				 	    <annotation>RST外部复位设置</annotation>
				 	    <bit>BIT[7:7]</bit>
				 	    <A0>P20为输入/输出脚</A0>
					    <A1>P20为外部复位脚</A1>  
					 </RSTEN>	
				</UOPT1>
				<UOPT2>
				    <address>0x8012</address>
					  <LVRVS>
						  <annotation>LVR复位电压选择</annotation>
						  <bit>BIT[2:0]</bit>		
							<A010>LVR电压=3.3V</A010>		
							<A100>LVR电压=2.7V</A100>				
							<A101>LVR电压=2.3V</A101>	
							<A110>LVR电压=2.0V</A110>		
					 </LVRVS> 
					 <P0DRVS>
					 	  <annotation>P0输出驱动电流选择</annotation>
					 	 <bit>BIT[3:3]</bit>
					 	 <A0>增强驱动输出</A0>
						 <A1>正常驱动输出</A1>
					 </P0DRVS>
					 <LVRMD>
					    <annotation>LVR模式设置</annotation>
						<bit>BIT[4:4]</bit>
						<A0>LVR在运行模式下开启，在低功耗模式下关闭</A0>
						<A1>LVR始终开启</A1>
					 </LVRMD>			 
					 <ENCR>
					    <annotation>程序代码加密设置</annotation>
						<bit>BIT[5:5]</bit>
						<A0>程序代码不加密</A0>
						<A1>程序代码加密</A1>
					 </ENCR>		
					 <DBGPINE>
					    <annotation>编程端口设置</annotation>
						<bit>BIT[6:6]</bit>
						<A0>芯片仅在复位时可通过编程端口进入编程/仿真模式</A0>
						<A1>端口始终用作编程/仿真接口，芯片可随时切入编程/仿真模式</A1>
					 </DBGPINE>		
					 <DBGPINS>
					    <annotation>编程端口选择</annotation>
						<bit>BIT[7:7]</bit>
						<A0>编程端口PCK0/PDT0支持编程扩展设置</A0>
						<A1>编程端口PCK1/PDT1支持编程扩展设置</A1>
					 </DBGPINS>			
				</UOPT2>	
			  <DOPT1>
				  <address>0x8021</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT1>  
				<DOPT2>
				  <address>0x8022</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT2>  
				<DOPT3>
				  <address>0x8023</address>	    
				  <!--
				  <CPEN>
						    <annotation>高频振荡器电荷泵控制</annotation>	
						  <bit>BIT[4:4]</bit> 
						  <A0>关闭</A0>
						  <A1>开启</A1>
					</CPEN>
					-->
				</DOPT3> 
				<DOPT4>
				  <address>0x8024</address>	    
				  <!--
				  <CMPICAL>
						    <annotation>比较器1基准电流调节位</annotation>	
						  <bit>BIT[6:6]</bit> 
						  <A0>正常电流</A0>
						  <A1>比较器电流增加1倍</A1>
					</CMPICAL>	
					-->
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT4> 
				<DOPT5>
				  <address>0x8025</address>	
				  <!--    
				  <BG_TEST_EN>
						    <annotation>BG输出驱动模块控制</annotation>	
						  <bit>BIT[5:5]</bit> 
						  <A0>关闭</A0>
						  <A1>打开</A1>
					</BG_TEST_EN>	
					-->
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT5> 
				<DOPT6>
				  <address>0x8026</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT6> 
				<DOPT7>
				  <address>0x8027</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT7> 
				<DOPT8>
				  <address>0x8028</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT8> 				
				<DOPT9>
				  <address>0x8029</address>	    
				 <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT9> 
				<DOPT10>
				  <address>0x802A</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:13]</bit>
							<A000>默认为0</A000>
					</default>
				</DOPT10>	
				<DOPT11>
				  <address>0x802B</address>	    
					<!--
					<PPGSEL>
						    <annotation>BG输出驱动模块控制</annotation>	
						  <bit>BIT[0:0]</bit> 
						  <A0>PPG从P01输出</A0>
						  <A1>PPG从P21输出</A1>
					</PPGSEL>	
					-->
					<!--
					<CP4CFG>
						    <annotation>CP4CFG</annotation>	
						  <bit>BIT[1:1]</bit> 
						  <A1>CP4功能有效</A1>
						  <A0>CP4功能无效</A0>
					</CP4CFG>	
					-->
				</DOPT11> 	
				<!--
				<DOPT12>
				  <address>0x802C</address>	    
				  <PAD_FIL>
						    <annotation>输入端滤波器使能控制</annotation>	
						  <bit>BIT[4:4]</bit> 
						  <A0>输入不通过滤波器</A0>
						  <A1>输入通过滤波器</A1>
					</PAD_FIL>	
					<PAD_RD>
						    <annotation>PAD_RD</annotation>	
						  <bit>BIT[5:5]</bit> 
						  <A0>读寄存器</A0>
						  <A1>读端口</A1>
					</PAD_RD>	
				</DOPT12> 	
				-->
	 		</OPTIONS>
    </MCU>
       <MCU name="MC32F7072" type="RISC16" id="0x7072">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0fff" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0000ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <!-- 0x790B -->
     <!--
     some evchip addr to Osccal_Adjust @2018.02.27 
     Osccal_Mode 功能开启总开关；		Osccal_Nop_num nup个数，用于osccal_S19的个数检测时间校准0x0640
     （Osccal_Nop_num，修改为osccal_7041工程的结束地址加1  20180829）
     Osccal_Time_Standard 校准标准，跟CPU及nop个数有关，如内部RC 16M、2T，8M，0.125us*1600，200us	。200*72=0x3840 	
     Osccal_USER_OPT0、1、2、3、4 配置初始值，其中包含内部RC、加密位、tadj、分频、16M等
     Osccal_Osc_bits osccal校准值的位数			Osccal_Osc_posit 02：OPT2；00：起始位置		Osccal_Osc_range 校准的范围 *1/100					
     -->
      <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0020" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x000B" Osccal_Osc_posit="0x0100" Osccal_Osc_range="0x1"/>
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="false" EEPROM_AddrFirst="0x008080" EEPROM_Size="0x0100"/>
			<firmware_cfg Firm_Ver="0x0700" Firm_name="ICE_SLIN_Fv7.0.srec"/>
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="LVDCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
	<reg name="PDP1" addr="0x197" />
 	<reg name="IOP2" addr="0x198" />
 	<reg name="OEP2" addr="0x199" />
	 <reg name="PUP2" addr="0x19A" />
	 <reg name="PDP2" addr="0x19B" />
	 <reg name="PWM0CR0" addr="0x19C" />
	 <reg name="PWM0CR1" addr="0x19D" />
	 <reg name="PWM0CR2" addr="0x19E" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
         <reg name="T1CR" addr="0x1A5" />
        <reg name="T1CNT" addr="0x1A6" />
        <reg name="T1LOAD" addr="0x1A7" />
        <reg name="T2CR" addr="0x1A8" />
        <reg name="T2CNT" addr="0x1A9" />
        <reg name="T2LOAD" addr="0x1AA" />
        <reg name="T2EFR" addr="0x1AC" />
         <reg name="T3CR" addr="0x1AD" />
        <reg name="T3CNT" addr="0x1AE" />
        <reg name="T3LOAD" addr="0x1AF" />
        <reg name="IICCR" addr="0x1B0" />
        <reg name="IICAR" addr="0x1B1" />
        <reg name="IICDR" addr="0x1B2" />
        <reg name="EEDRH" addr="0x1B3" />
        <reg name="EECR" addr="0x1B4" />
        <reg name="EEMASK" addr="0x1B5" />
        <reg name="EEAR" addr="0x1B6" />
        <reg name="EEDRL" addr="0x1B7" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="P0ADCR" addr="0x1BC" />
        <reg name="P1ADCR" addr="0x1BD" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="MEFCR" addr="0x1BF" />
         <reg name="CP0TDB" addr="0x1C4" />
         <reg name="OPACR" addr="0x1C5" />
         <reg name="OPACLR" addr="0x1C6" />
         <reg name="CP4CLR" addr="0x1C7" />
         <reg name="CPCR0" addr="0x1C8" />
         <reg name="CPSR" addr="0x1C9" />
         <reg name="CPVR0" addr="0x1CA" />
         <reg name="CPVR1" addr="0x1CB" />
         <reg name="CP0CLR" addr="0x1CC" />        
         <reg name="CP1CLR" addr="0x1CD" />    
         <reg name="CP2CLR" addr="0x1CE" />   
         <reg name="CP3CLR" addr="0x1CF" />     
         <reg name="CPCR1" addr="0x1D0" />    
         <reg name="CPCR2" addr="0x1D1" />    
         <reg name="CPDB0" addr="0x1D2" />    
         <reg name="CPDB1" addr="0x1D3" />    
         <reg name="DBGCR" addr="0x1D6" />    
         <reg name="DBGPR" addr="0x1D7" />   
      </regs>
      <OPTIONS>
				<COPT1>
					<address>0x8001</address>		
					<FCPUS>
						  <annotation>高频时钟下FCPU分频选择</annotation>
						  <bit>BIT[6:4]</bit>		
						  <A000>FCPU=FHOSC/2</A000>	 	
						  <A001>FCPU=FHOSC/4</A001>	
							<A010>FCPU=FHOSC/8</A010>		
							<A011>FCPU=FHOSC/16</A011>	
							<A100>FCPU=FHOSC/32</A100>				
							<A101>FCPU=FHOSC/64</A101>	
					 </FCPUS> 
				</COPT1>
				<UOPT1>
				    <address>0x8011</address>
				    <WDTT>
					    <annotation>WDT溢出时间选择</annotation>
							<bit>BIT[2:0]</bit>
							<A010>64ms</A010>
							<A110>2048ms</A110>
					 </WDTT>
					 <HIRCFS>
				 	    <annotation>HIRC振荡频率选择</annotation>
				 	    <bit>BIT[3:3]</bit>
				 	    <A0>FHIRC=16MHz</A0>
					    <A1>FHIRC=32MHz</A1>  
					 </HIRCFS>	
					 <WDTM>
						  <annotation>WDT模式设置</annotation>
						  <bit>BIT[5:4]</bit>		
						  <A00>WDT始终关闭</A00>	 	
						  <A01>WDT在运行模式下开启，在低功耗模式下关闭</A01>	
							<A11>WDT始终开启</A11>				
					 </WDTM> 
					 <default>
				 	    <annotation>IO输出翻转速度选择</annotation>
				 	    <bit>BIT[6:6]</bit>
					    <A1>快速翻转（快开快关）</A1>  
					    <A0>慢速翻转（慢开快关）</A0>
					 </default>	
					 <RSTEN>
				 	    <annotation>RST外部复位设置</annotation>
				 	    <bit>BIT[7:7]</bit>
				 	    <A0>P20为输入/输出脚</A0>
					    <A1>P20为外部复位脚</A1>  
					 </RSTEN>	
				</UOPT1>
				<UOPT2>
				    <address>0x8012</address>
					  <LVRVS>
						  <annotation>LVR复位电压选择</annotation>
						  <bit>BIT[2:0]</bit>		
							<A010>LVR电压=3.3V</A010>		
							<A100>LVR电压=2.7V</A100>				
							<A101>LVR电压=2.3V</A101>	
							<A110>LVR电压=2.0V</A110>		
					 </LVRVS> 
					 <P0DRVS>
					 	  <annotation>P0输出驱动电流选择</annotation>
					 	 <bit>BIT[3:3]</bit>
					 	 <A0>增强驱动输出</A0>
						 <A1>正常驱动输出</A1>
					 </P0DRVS>
					 <LVRMD>
					    <annotation>LVR模式设置</annotation>
						<bit>BIT[4:4]</bit>
						<A0>LVR在运行模式下开启，在低功耗模式下关闭</A0>
						<A1>LVR始终开启</A1>
					 </LVRMD>			 
					 <ENCR>
					    <annotation>程序代码加密设置</annotation>
						<bit>BIT[5:5]</bit>
						<A0>程序代码不加密</A0>
						<A1>程序代码加密</A1>
					 </ENCR>		
					 <DBGPINE>
					    <annotation>编程端口设置</annotation>
						<bit>BIT[6:6]</bit>
						<A0>芯片仅在复位时可通过编程端口进入编程/仿真模式</A0>
						<A1>端口始终用作编程/仿真接口，芯片可随时切入编程/仿真模式</A1>
					 </DBGPINE>		
					 <DBGPINS>
					    <annotation>编程端口选择</annotation>
						<bit>BIT[7:7]</bit>
						<A0>编程端口PCK0/PDT0支持编程扩展设置</A0>
						<A1>编程端口PCK1/PDT1支持编程扩展设置</A1>
					 </DBGPINS>			
				</UOPT2>	
			  <DOPT1>
				  <address>0x8021</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT1>  
				<DOPT2>
				  <address>0x8022</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT2>  
				<DOPT3>
				  <address>0x8023</address>	    
				  <!--
				  <CPEN>
						    <annotation>高频振荡器电荷泵控制</annotation>	
						  <bit>BIT[4:4]</bit> 
						  <A0>关闭</A0>
						  <A1>开启</A1>
					</CPEN>
					-->
				</DOPT3> 
				<DOPT4>
				  <address>0x8024</address>	    
				  <!--
				  <CMPICAL>
						    <annotation>比较器1基准电流调节位</annotation>	
						  <bit>BIT[6:6]</bit> 
						  <A0>正常电流</A0>
						  <A1>比较器电流增加1倍</A1>
					</CMPICAL>	
					-->
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT4> 
				<DOPT5>
				  <address>0x8025</address>	
				  <!--    
				  <BG_TEST_EN>
						    <annotation>BG输出驱动模块控制</annotation>	
						  <bit>BIT[5:5]</bit> 
						  <A0>关闭</A0>
						  <A1>打开</A1>
					</BG_TEST_EN>	
					-->
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT5> 
				<DOPT6>
				  <address>0x8026</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT6> 
				<DOPT7>
				  <address>0x8027</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT7> 
				<DOPT8>
				  <address>0x8028</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT8> 				
				<DOPT9>
				  <address>0x8029</address>	    
				 <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT9> 
				<DOPT10>
				  <address>0x802A</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:13]</bit>
							<A000>默认为0</A000>
					</default>
				</DOPT10>	
				<DOPT11>
				  <address>0x802B</address>	    
					<!--
					<PPGSEL>
						    <annotation>BG输出驱动模块控制</annotation>	
						  <bit>BIT[0:0]</bit> 
						  <A0>PPG从P01输出</A0>
						  <A1>PPG从P21输出</A1>
					</PPGSEL>	
					-->
					<!--
					<CP4CFG>
						    <annotation>CP4CFG</annotation>	
						  <bit>BIT[1:1]</bit> 
						  <A1>CP4功能有效</A1>
						  <A0>CP4功能无效</A0>
					</CP4CFG>	
					-->
				</DOPT11> 	
				<!--
				<DOPT12>
				  <address>0x802C</address>	    
				  <PAD_FIL>
						    <annotation>输入端滤波器使能控制</annotation>	
						  <bit>BIT[4:4]</bit> 
						  <A0>输入不通过滤波器</A0>
						  <A1>输入通过滤波器</A1>
					</PAD_FIL>	
					<PAD_RD>
						    <annotation>PAD_RD</annotation>	
						  <bit>BIT[5:5]</bit> 
						  <A0>读寄存器</A0>
						  <A1>读端口</A1>
					</PAD_RD>	
				</DOPT12> 	
				-->
	 		</OPTIONS>
    </MCU>
    <MCU name="MC32F7073" type="RISC16" id="0x7073">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x1fff" chip_romSize="0x2000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x801fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00017f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0020" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x000B" Osccal_Osc_posit="0x0100" Osccal_Osc_range="0x1"/>
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x00C000" EEPROM_Size="0x0200"/>
			<firmware_cfg Firm_Ver="0x0405" Firm_name="ICE_SLIN_Fv4.5.srec"/>
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="INTE1" addr="0x18D" />
        <reg name="INTF1" addr="0x18E" />
        <reg name="P1KBCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
				<reg name="PDP1" addr="0x197" />
 				<reg name="IOP2" addr="0x198" />
 				<reg name="OEP2" addr="0x199" />
			  <reg name="PUP2" addr="0x19A" />
	 			<reg name="PDP2" addr="0x19B" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="PWM0CR0" addr="0x1A4" />
        <reg name="PWM0CR1" addr="0x1A5" />
        <reg name="T1CR" addr="0x1A8" />
        <reg name="T1CNTH" addr="0x1A9" />
        <reg name="T1CNTL" addr="0x1AA" />
         <reg name="T1LOADH" addr="0x1AB" />
         <reg name="T1LOADL" addr="0x1AC" />
         <reg name="T1DATAH" addr="0x1AD" />
         <reg name="T1DATAL" addr="0x1AE" />
         <reg name="EEDRH" addr="0x1AF" />
        <reg name="IICCR" addr="0x1B0" />
        <reg name="IICSR" addr="0x1B1" />
        <reg name="IICDR" addr="0x1B2" />
        <reg name="HIRCCAL" addr="0x1B3" />
        <reg name="EECR" addr="0x1B4" />
        <reg name="EEPR" addr="0x1B5" />
        <reg name="EEAR" addr="0x1B6" />
        <reg name="EEDRL" addr="0x1B7" />
        <reg name="ADCR0" addr="0x1B8" />
        <reg name="ADCR1" addr="0x1B9" />
        <reg name="ADRH" addr="0x1BA" />
        <reg name="ADRL" addr="0x1BB" />
        <reg name="ADIOS0" addr="0x1BC" />
        <reg name="ADIOS1" addr="0x1BD" />
        <reg name="OSADJCR" addr="0x1BE" />
        <reg name="T2CR" addr="0x1C0" />
         <reg name="T2CNTH" addr="0x1C1" />
         <reg name="T2CNTL" addr="0x1C2" />
         <reg name="T2LOADH" addr="0x1C3" />
         <reg name="T2LOADL" addr="0x1C4" />
         <reg name="T3CR" addr="0x1C5" />
         <reg name="T3CNT" addr="0x1C6" />
         <reg name="T3LOAD" addr="0x1C7" />
         <reg name="SCON" addr="0x1C8" />
         <reg name="SBUF" addr="0x1C9" />
         <reg name="SADDR" addr="0x1CA" />
         <reg name="SADEN" addr="0x1CB" />
         <reg name="T3DATA" addr="0x1CC" />
         <reg name="T3DATB" addr="0x1CD" />
         <reg name="T3DATC" addr="0x1CE" />
         <reg name="PWM3CR" addr="0x1CF" />
         <reg name="PMAP" addr="0x1D5" />
         <reg name="DBGCR" addr="0x1D6" />
         <reg name="DBGPR" addr="0x1D7" />
      </regs>
      <OPTIONS>
				<COPT1>
					<address>0x8001</address>		
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:0]</bit>
							<A0000000000000000>默认为0</A0000000000000000>
					</default>
				</COPT1>
				<UOPT1>
				    <address>0x8011</address>
				    <WDTM>
					    <annotation>WDT模式设置</annotation>
							<bit>BIT[1:0]</bit>
							<A00>WDT始终关闭</A00>
							<A01>WDT低功耗模式下关闭</A01>
							<A11>WDT始终开启</A11>
					 </WDTM>
					 <RSTEN>
				 	    <annotation>外部reset设置</annotation>
				 	    <bit>BIT[2:2]</bit>
				 	    <A0>P05仅为I/O口</A0>
					    <A1>P05为外部低电平复位</A1>  
					 </RSTEN>	
					 <HIRCFS>
				 	    <annotation>HIRC 预分频选择</annotation>
				 	    <bit>BIT[3:3]</bit>
				 	    <A0>16 MHz</A0>
					    <A1>32 MHz</A1>  
					 </HIRCFS>	
					 <VLVRS>
						  <annotation>低压复位电压选择位</annotation>
						  <bit>BIT[6:4]</bit>		
							<A010>3.6V</A010>		
							<A100>2.7V</A100>			
							<A101>2.4V</A101>	
							<A110>2.0V</A110>			
					 </VLVRS> 
					 <LVRMD>
				 	    <annotation>LVR低功耗设置</annotation>
				 	    <bit>BIT[7:7]</bit>
				 	    <A0>LVR在运行模式下开启，在低功耗模式下关闭</A0>
					    <A1>LVR始终开启</A1>  
					 </LVRMD>	
					 <WDTT>
					    <annotation>WDT溢出时间选择</annotation>
					    <bit>BIT[10:8]</bit>
							<A001>2048ms</A001>
							<A110>64ms</A110>
					 </WDTT>	
					 <ENCR>
				 	    <annotation>代码加密选项</annotation>
				 	    <bit>BIT[13:13]</bit>
				 	    <A0>程序代码不加密</A0>
					    <A1>程序代码加密</A1>  
					 </ENCR>	
				</UOPT1>
				<UOPT2>
				    <address>0x8012</address>
					  <FCPUS>
						  <annotation>高频时钟下FCPU分频选择</annotation>
						  <bit>BIT[2:0]</bit>		
							<A010>FCPU=FHOSC/64</A010>		
							<A011>FCPU=FHOSC/32</A011>	
							<A100>FCPU=FHOSC/16</A100>				
							<A101>FCPU=FHOSC/8</A101>	
							<A110>FCPU=FHOSC/4</A110>		
							<A111>FCPU=FHOSC/2</A111>		
					 </FCPUS> 
					 <SMTVS>
					 	  <annotation>端口施密特阈值选择</annotation>
					 	 <bit>BIT[3:3]</bit>
					 	 <A0>2.0V/0.8V</A0>
						 <A1>0.8VDD/0.2VDD</A1>
					 </SMTVS>
					 <P0DRVS>
					    <annotation>P0口驱动能力选择</annotation>
						<bit>BIT[4:4]</bit>
						<A0>增强驱动输出</A0>
						<A1>正常驱动输出</A1>
					 </P0DRVS>			 
					 <DBGPIN0>
					    <annotation>PCK0/PDT0编程端口设置</annotation>
						<bit>BIT[5:5]</bit>
						<A0>PCK0/PDT0端口在复位时固定为编程端口，复位完成后固定为通用端口</A0>
						<A1>PCK0/PDT0可通过寄存器位将端口切换为编程端口或通用端口</A1>
					 </DBGPIN0>		
					 <DBGPIN1>
					    <annotation>PCK1/PDT1编程端口设置</annotation>
						<bit>BIT[6:6]</bit>
						<A0>PCK1/PDT1端口在复位时固定为编程端口，复位完成后固定为通用端口</A0>
						<A1>PCK1/PDT1可通过寄存器位将端口切换为编程端口或通用端口</A1>
					 </DBGPIN1>		
					 <SPDS>
					    <annotation>I/O翻转速度设置</annotation>
						<bit>BIT[7:7]</bit>
						<A0>低速输出</A0>
						<A1>高速输出</A1>
					 </SPDS>			
					 <default>
					    <annotation>输出管脚的回读选择</annotation>
						<bit>BIT[8:8]</bit>
						<A0>由用户配置设定</A0>
						<A1>直接来自IO PAD</A1>
					 </default>		
					 <default>
					    <annotation>EEPROM容量选择</annotation>
						<bit>BIT[9:9]</bit>
						<A0>256 * 16-bit</A0>
						<A1>64 * 16-bit</A1>
					 </default>		
				</UOPT2>	
			  <DOPT1>
				  <address>0x8021</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT1>  
				<DOPT2>
				  <address>0x8022</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT2>  
				<DOPT3>
				  <address>0x8023</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT3> 
				<DOPT4>
				  <address>0x8024</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT4> 
				<DOPT5>
				  <address>0x8025</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT5> 
				<DOPT6>
				  <address>0x8026</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT6> 
				<DOPT7>
				  <address>0x8027</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT7> 			
				<DOPT8>
				  <address>0x8028</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT8> 
				<DOPT9>
				  <address>0x8029</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:0]</bit>
							<A0000000000000000>默认为0</A0000000000000000>
					</default>
				</DOPT9> 	
	 		</OPTIONS>
    </MCU>
    <MCU name="MC32F7062" type="RISC16" id="0x7062">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0fff" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x00C000" EEPROM_Size="0x0100"/>
      <firmware_cfg Firm_Ver="0x0301" Firm_name="ICE_SLIN_Fv3.1.srec"/>
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="HIRCCAL" addr="0x18D" />
        <reg name="INTE1" addr="0x18E" />
        <reg name="INTF1" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
				<reg name="PDP1" addr="0x197" />
 				<reg name="IOP2" addr="0x198" />
 				<reg name="OEP2" addr="0x199" />
			  <reg name="PUP2" addr="0x19A" />
	 			<reg name="PDP2" addr="0x19B" />
	 			<reg name="P1KBCR" addr="0x19C" />
 				<reg name="OPACR0" addr="0x19D" />
			  <reg name="OPACR1" addr="0x19E" />		
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="LVDCR" addr="0x1A4" />
        <reg name="CMPCR0" addr="0x1A5" />
        <reg name="CMPCR1" addr="0x1A6" />
        <reg name="CMPCLR" addr="0x1A7" />
        <reg name="T1CR0" addr="0x1A8" />
        <reg name="T1CR1" addr="0x1A9" />
        <reg name="T1CNTH" addr="0x1AA" />
         <reg name="T1CNTL" addr="0x1AB" />
         <reg name="T1LOADH" addr="0x1AC" />
         <reg name="T1LOADL" addr="0x1AD" />
        <reg name="T2CR" addr="0x1B0" />
        <reg name="T2CNT" addr="0x1B1" />
        <reg name="T2LOAD" addr="0x1B2" />
        <reg name="T2DATA" addr="0x1B3" />
        <reg name="PWM2CR0" addr="0x1B4" />
        <reg name="PWM2CR1" addr="0x1B5" />
        <reg name="PWM2CR2" addr="0x1B6" />
        <reg name="T3CR" addr="0x1B8" />
        <reg name="T3CNT" addr="0x1B9" />
        <reg name="T3LOAD" addr="0x1BA" />
        <reg name="T3DATA" addr="0x1BB" />
        <reg name="T3DATB" addr="0x1BC" />
        <reg name="T3DATC" addr="0x1BD" />
        <reg name="PWM3CR0" addr="0x1BE" />
        <reg name="PWM3CR1" addr="0x1BF" />        
        <reg name="PWM3CR2" addr="0x1C0" />
         <reg name="PWM3CR3" addr="0x1C1" />     
         <reg name="PWM3CR4" addr="0x1C2" />     
         <reg name="EECR" addr="0x1C4" />
         <reg name="EEPR" addr="0x1C5" />
         <reg name="EEAR" addr="0x1C6" />
         <reg name="EEDR" addr="0x1C7" />
         <reg name="ADCR0" addr="0x1C8" />
         <reg name="ADCR1" addr="0x1C9" />
         <reg name="ADRH" addr="0x1CA" />
         <reg name="ADRL" addr="0x1CB" />
         <reg name="OSADJCR" addr="0x1CC" />
         <reg name="P0ADCR" addr="0x1CD" />
         <reg name="P1ADCR" addr="0x1CE" />
         <reg name="P2ADCR" addr="0x1CF" />
      </regs>
  </MCU>
    <MCU name="MC32F7082" type="RISC16" id="0x7082">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0fff" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x00C000" EEPROM_Size="0x0100"/>
      <firmware_cfg Firm_Ver="0x0301" Firm_name="ICE_SLIN_Fv3.1.srec"/>
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="HIRCCAL" addr="0x18D" />
        <reg name="INTE1" addr="0x18E" />
        <reg name="INTF1" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
				<reg name="PDP1" addr="0x197" />
 				<reg name="IOP2" addr="0x198" />
 				<reg name="OEP2" addr="0x199" />
			  <reg name="PUP2" addr="0x19A" />
	 			<reg name="PDP2" addr="0x19B" />
	 			<reg name="P1KBCR" addr="0x19C" />
 				<reg name="OPACR0" addr="0x19D" />
			  <reg name="OPACR1" addr="0x19E" />		
			  <reg name="OPACLR" addr="0x19F" />		
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="LVDCR" addr="0x1A4" />
        <reg name="CMPCR0" addr="0x1A5" />
        <reg name="CMPCR1" addr="0x1A6" />
        <reg name="CMPCLR" addr="0x1A7" />
        <reg name="T1CR0" addr="0x1A8" />
        <reg name="T1CR1" addr="0x1A9" />
        <reg name="T1CNTH" addr="0x1AA" />
         <reg name="T1CNTL" addr="0x1AB" />
         <reg name="T1LOADH" addr="0x1AC" />
         <reg name="T1LOADL" addr="0x1AD" />
        <reg name="T2CR" addr="0x1B0" />
        <reg name="T2CNT" addr="0x1B1" />
        <reg name="T2LOAD" addr="0x1B2" />
        <reg name="T2DATA" addr="0x1B3" />
        <reg name="PWM2CR0" addr="0x1B4" />
        <reg name="PWM2CR1" addr="0x1B5" />
        <reg name="PWM2CR2" addr="0x1B6" />
        <reg name="T3CR" addr="0x1B8" />
        <reg name="T3CNT" addr="0x1B9" />
        <reg name="T3LOAD" addr="0x1BA" />
        <reg name="T3DATA" addr="0x1BB" />
        <reg name="T3DATB" addr="0x1BC" />
        <reg name="T3DATC" addr="0x1BD" />
        <reg name="PWM3CR0" addr="0x1BE" />
        <reg name="PWM3CR1" addr="0x1BF" />        
        <reg name="PWM3CR2" addr="0x1C0" />
         <reg name="PWM3CR3" addr="0x1C1" />     
         <reg name="PWM3CR4" addr="0x1C2" />     
         <reg name="EECR" addr="0x1C4" />
         <reg name="EEPR" addr="0x1C5" />
         <reg name="EEAR" addr="0x1C6" />
         <reg name="EEDR" addr="0x1C7" />
         <reg name="ADCR0" addr="0x1C8" />
         <reg name="ADCR1" addr="0x1C9" />
         <reg name="ADRH" addr="0x1CA" />
         <reg name="ADRL" addr="0x1CB" />
         <reg name="OSADJCR" addr="0x1CC" />
         <reg name="P0ADCR" addr="0x1CD" />
         <reg name="P1ADCR" addr="0x1CE" />
         <reg name="P2ADCR" addr="0x1CF" />
      </regs>
  </MCU>
   <MCU name="MC32F7361" type="RISC16" id="0x7361">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0000ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <!-- 0x790B -->
     <!--
     some evchip addr to Osccal_Adjust @2018.02.27 
     Osccal_Mode 功能开启总开关；		Osccal_Nop_num nup个数，用于osccal_S19的个数检测时间校准0x0640
     （Osccal_Nop_num，修改为osccal_7041工程的结束地址加1  20180829）
     Osccal_Time_Standard 校准标准，跟CPU及nop个数有关，如内部RC 16M、2T，8M，0.125us*1600，200us	。200*72=0x3840 	
     Osccal_USER_OPT0、1、2、3、4 配置初始值，其中包含内部RC、加密位、tadj、分频、16M等
     Osccal_Osc_bits osccal校准值的位数			Osccal_Osc_posit 02：OPT2；00：起始位置		Osccal_Osc_range 校准的范围 *1/100					
     -->
      <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0020" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x000B" Osccal_Osc_posit="0x0100" Osccal_Osc_range="0x1"/>
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x00C000" EEPROM_Size="0x0100"/>
			<firmware_cfg Firm_Ver="0x0404" Firm_name="ICE_SLIN_Fv4.4.srec"/>
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="DRVCR" addr="0x18C" />
        <reg name="P0KBCR" addr="0x18D" />
        <reg name="P1KBCR" addr="0x18E" />
        <reg name="P2KBCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" />
        <reg name="T0CR" addr="0x198" />
        <reg name="T0CNT" addr="0x199" />
        <reg name="T0LOAD" addr="0x19A" />
        <reg name="T0DATA" addr="0x19B" />
        <reg name="T1CR" addr="0x19C" />
        <reg name="T1CNT" addr="0x19D" />
        <reg name="T1LOAD" addr="0x19E" />
        <reg name="T1DATA" addr="0x19F" />
        <reg name="T2CR" addr="0x1A0" />
        <reg name="T2CNT" addr="0x1A1" />
        <reg name="T2LOAD" addr="0x1A2" />
        <reg name="T2DATA" addr="0x1A3" />
        <reg name="T3CR" addr="0x1A4" />
        <reg name="T3CNT" addr="0x1A5" />
        <reg name="T3LOAD" addr="0x1A6" />
        <reg name="PWM0DR" addr="0x1A8" />
        <reg name="PWM1DR" addr="0x1A9" />
        <reg name="PWM2DR" addr="0x1AA" />
        <reg name="PWMCR0" addr="0x1AC" />
        <reg name="PWMCR1" addr="0x1AD" />
        <reg name="OSCMR" addr="0x1AE" />
        <reg name="LVDCR" addr="0x1AF" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADCR2" addr="0x1B2" />
        <reg name="OSADJCR" addr="0x1B3" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
        <reg name="P0ADCR" addr="0x1B6" />
        <reg name="P1ADCR" addr="0x1B7" />
        <reg name="IOP2" addr="0x1B8" />
        <reg name="OEP2" addr="0x1B9" />
        <reg name="PUP2" addr="0x1BA" />
        <reg name="PDP2" addr="0x1BB" />
        <reg name="PMOD" addr="0x1BC" />
        <reg name="PWMCR3" addr="0x1BD" />
        <reg name="PWMCR2" addr="0x1BE" />
        <reg name="PFRCCR" addr="0x1C0" />
        <reg name="PFRCCAL" addr="0x1C1" />
        <reg name="EECR" addr="0x1C3" />
        <reg name="EEPR" addr="0x1C4" />
        <reg name="EEAR" addr="0x1C5" />
        <reg name="EEDRH" addr="0x1C6" />
        <reg name="EEDRL" addr="0x1C7" />
        <reg name="DBGCR" addr="0x1F5" />
        <reg name="DBGPR" addr="0x1F6" />
        <reg name="HIRCCAL" addr="0x1FC" />
      </regs>
      <OPTIONS>
				<COPT1>
					<address>0x8001</address>		
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</COPT1>
				<UOPT1>
				    <address>0x8011</address>
				    <WDTM>
					    <annotation>WDT模式设置</annotation>
							<bit>BIT[1:0]</bit>
							<A00>WDT始终关闭</A00>
							<A01>WDT在运行模式下开启，在低功耗模式下关闭</A01>
							<A11>WDT始终开启</A11>
					 </WDTM>
					 <RSTEN>
				 	    <annotation>RST外部复位设置</annotation>
				 	    <bit>BIT[2:2]</bit>
				 	    <A0>P13为输入/输出脚</A0>
					    <A1>P13为外部复位脚</A1>  
					 </RSTEN>	
					 <VLVRS>
						  <annotation>低压复位电压选择位</annotation>
						  <bit>BIT[6:4]</bit>		
						  <A001>4.1V</A001>	
							<A100>2.7V</A100>	
							<A101>2.4V</A101>			
							<A110>2.0V</A110>			
					 </VLVRS> 
					 <WDTT>
					    <annotation>WDT溢出时间选择</annotation>
					    <bit>BIT[10:8]</bit>
					    <A000>4096ms</A000>
							<A001>2048ms</A001>
							<A010>1024ms</A010>
							<A100>256ms</A100>
							<A110>64ms</A110>
							<A111>16ms</A111>
					 </WDTT>	
					 <ENCR>
				 	    <annotation>程序代码加密选项</annotation>
				 	    <bit>BIT[13:13]</bit>
				 	    <A0>程序代码不加密</A0>
					    <A1>程序代码加密</A1>  
					 </ENCR>	
				</UOPT1>
				<UOPT2>
				    <address>0x8012</address>
					  <FCPUS>
						  <annotation>高频时钟下FCPU分频选择</annotation>
						  <bit>BIT[2:0]</bit>		
							<A010>FCPU=FHOSC/64</A010>		
							<A011>FCPU=FHOSC/32</A011>	
							<A100>FCPU=FHOSC/16</A100>				
							<A101>FCPU=FHOSC/8</A101>	
							<A110>FCPU=FHOSC/4</A110>		
							<A111>FCPU=FHOSC/2</A111>		
					 </FCPUS> 
					 <SMTVS>
					 	  <annotation>端口施密特阈值选择</annotation>
					 	 <bit>BIT[3:3]</bit>
					 	 <A0>2.0V/0.8V</A0>
						 <A1>0.8VDD/0.2VDD</A1>
					 </SMTVS>
					 <LOSCS>
					    <annotation>低频选择</annotation>
						<bit>BIT[4:4]</bit>
						<A0>外部32768Hz晶体振荡器时钟FXTAL</A0>
						<A1>FLOSC=内部低频RC振荡器时钟FLIRC</A1>
					 </LOSCS>			 
					 <DBGPIN0>
					    <annotation>PCK0/PDT0编程端口设置</annotation>
						<bit>BIT[5:5]</bit>
						<A0>芯片仅在复位时可通过P16/P17进入编程/仿真模式</A0>
						<A1>P16/P17仅用作编程/仿真接口，芯片可随时切入编程/仿真模式</A1>
					 </DBGPIN0>		
					 <DBGPIN1>
					    <annotation>PCK1/PDT1编程端口设置</annotation>
						<bit>BIT[6:6]</bit>
						<A0>芯片仅在复位时可通过P04/P15进入编程/仿真模式</A0>
						<A1>P04/P15仅用作编程/仿真接口，芯片可随时切入编程/仿真模式</A1>
					 </DBGPIN1>		
					 <SPDS>
					    <annotation>I/O（除P16/P17外）翻转速度设置</annotation>
						<bit>BIT[7:7]</bit>
						<A0>低速输出</A0>
						<A1>高速输出</A1>
					 </SPDS>			
				</UOPT2>	
			  <DOPT1>
				  <address>0x8021</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT1>  
				<DOPT2>
				  <address>0x8022</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT2>  
				<DOPT3>
				  <address>0x8023</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT3> 
				<DOPT4>
				  <address>0x8024</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT4> 
				<DOPT5>
				  <address>0x8025</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT5> 
				<DOPT6>
				  <address>0x8026</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT6> 
				<DOPT7>
				  <address>0x8027</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT7> 
				<DOPT8>
				  <address>0x8028</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT8> 				
				<DOPT9>
				  <address>0x8029</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT9> 
				<DOPT10>
				  <address>0x802A</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:13]</bit>
							<A000>默认为0</A000>
					</default>
				</DOPT10> 	
	 		</OPTIONS>
    </MCU>
   <MCU name="MS32F7362" type="RISC16" id="0x7362">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0fff" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x800fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00017f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0020" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x000B" Osccal_Osc_posit="0x0100" Osccal_Osc_range="0x1"/>
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x00C000" EEPROM_Size="0x0100"/>
			<firmware_cfg Firm_Ver="0x0800" Firm_name="ICE_SLIN_Fv8.0.srec"/>
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE0" addr="0x18A" />
        <reg name="INTF0" addr="0x18B" />
        <reg name="OSCMR" addr="0x18C" />
        <reg name="INTE1" addr="0x18E" />
        <reg name="INTF1" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
				<reg name="PDP1" addr="0x197" />
 				<reg name="IOP2" addr="0x198" />
 				<reg name="OEP2" addr="0x199" />
			  <reg name="PUP2" addr="0x19A" />
	 			<reg name="PDP2" addr="0x19B" />
	 			<reg name="P1KBCR" addr="0x19C" />
	 			<reg name="P2KBCR" addr="0x19D" />
	 			<reg name="LVDCR" addr="0x19F" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="HIRCCAL" addr="0x1A5" />
        <reg name="DBGCR" addr="0x1A6" />
        <reg name="DBGPR" addr="0x1A7" />
        <reg name="T1CR0" addr="0x1A8" />
        <reg name="T1CR1" addr="0x1A9" />
        <reg name="T1CNTH" addr="0x1AA" />
         <reg name="T1CNTL" addr="0x1AB" />
         <reg name="T1LOADH" addr="0x1AC" />
         <reg name="T1LOADL" addr="0x1AD" />
        <reg name="T2CR" addr="0x1B0" />
        <reg name="T2CNT" addr="0x1B1" />
        <reg name="T2LOAD" addr="0x1B2" />
        <reg name="T2DATA" addr="0x1B3" />
        <reg name="T2DATB" addr="0x1B4" />
        <reg name="T2DATC" addr="0x1B5" />
        <reg name="PWM2CR0" addr="0x1B6" />
        <reg name="PWM2CR1" addr="0x1B7" />
        <reg name="PWM2CR2" addr="0x1B8" />
         <reg name="EECR" addr="0x1C3" />
         <reg name="EEPR" addr="0x1C4" />
         <reg name="EEAR" addr="0x1C5" />
         <reg name="EEDRH" addr="0x1C6" />
         <reg name="EEDRL" addr="0x1C7" />
         <reg name="ADCR0" addr="0x1C8" />
         <reg name="ADCR1" addr="0x1C9" />
         <reg name="ADRH" addr="0x1CA" />
         <reg name="ADRL" addr="0x1CB" />
         <reg name="OSADJCR" addr="0x1CC" />
         <reg name="P0ADCR" addr="0x1CD" />
         <reg name="P1ADCR" addr="0x1CE" />
         <reg name="P2ADCR" addr="0x1CF" />
         <reg name="OPCR0" addr="0x1D0" />
         <reg name="OPCR1" addr="0x1D1" />
         <reg name="OPCR2" addr="0x1D2" />
         <reg name="OP0VRH" addr="0x1D3" />
         <reg name="OP0VRL" addr="0x1D4" />
         <reg name="OP1VRH" addr="0x1D5" />
         <reg name="OP1VRL" addr="0x1D6" />
         <reg name="OP2CLR" addr="0x1D7" />
         <reg name="URTCR0" addr="0x1D8" />
         <reg name="URTCR1" addr="0x1D9" />
         <reg name="URTCR2" addr="0x1DA" />
         <reg name="URTSR" addr="0x1DB" />
         <reg name="URTBR" addr="0x1DC" />
         <reg name="URTDR" addr="0x1DD" />
         <reg name="URTAR" addr="0x1DE" />
         <reg name="URTMR" addr="0x1DF" />
      </regs>
      <OPTIONS>
				<COPT1>
					<address>0x8001</address>		
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</COPT1>
				<UOPT1>
				    <address>0x8011</address>
				    <WDTM>
					    <annotation>WDT模式设置</annotation>
							<bit>BIT[1:0]</bit>
							<A00>WDT始终关闭</A00>
							<A01>WDT低功耗模式下关闭</A01>
							<A11>WDT始终开启</A11>
					 </WDTM>
					 <RSTEN>
				 	    <annotation>外部reset设置</annotation>
				 	    <bit>BIT[2:2]</bit>
				 	    <A0>P20为输入/输出脚</A0>
					    <A1>P20为外部复位脚</A1>  
					 </RSTEN>	
					 <LVRVS>
						  <annotation>低压复位电压选择位</annotation>
						  <bit>BIT[6:4]</bit>		
							<A100>2.7V</A100>			
							<A110>2.0V</A110>	
							<A111>1.8V</A111>				
					 </LVRVS> 
					 <LVRMD>
				 	    <annotation>LVR模式设置</annotation>
				 	    <bit>BIT[7:7]</bit>
				 	    <A0>LVR在运行模式下开启，在低功耗模式下关闭</A0>
					    <A1>LVR始终开启</A1>  
					 </LVRMD>	
					 <WDTT>
					    <annotation>WDT溢出时间选择</annotation>
					    <bit>BIT[10:8]</bit>
							<A010>1024ms</A010>
							<A100>256ms</A100>
							<A110>64ms</A110>
							<A111>16ms</A111>
					 </WDTT>	
					 <ENCR>
				 	    <annotation>代码加密选项</annotation>
				 	    <bit>BIT[13:13]</bit>
				 	    <A0>程序代码不加密</A0>
					    <A1>程序代码加密</A1>  
					 </ENCR>	
				</UOPT1>
				<UOPT2>
				    <address>0x8012</address>
					  <FCPUS>
						  <annotation>高频时钟下FCPU分频选择</annotation>
						  <bit>BIT[2:0]</bit>		
							<A010>FCPU=FHOSC/64</A010>		
							<A011>FCPU=FHOSC/32</A011>	
							<A100>FCPU=FHOSC/16</A100>				
							<A101>FCPU=FHOSC/8</A101>	
							<A110>FCPU=FHOSC/4</A110>			
					 </FCPUS> 
					 <SMTVS>
					 	  <annotation>端口施密特阈值选择</annotation>
					 	 <bit>BIT[3:3]</bit>
					 	 <A0>2.0V/0.8V</A0>
						 <A1>0.2VDD/0.8VDD</A1>
					 </SMTVS>
					 <DVRSB>
					    <annotation>P0口驱动能力选择</annotation>
						<bit>BIT[4:4]</bit>
						<A0>增强驱动输出</A0>
						<A1>正常驱动输出</A1>
					 </DVRSB>			 
					 <DBGPIN0>
					    <annotation>PCK0/PDT0编程端口设置</annotation>
						<bit>BIT[5:5]</bit>
						<A0>PCK0/PDT0在复位时固定为编程端口，复位完成后固定为通用端口</A0>
						<A1>PCK0/PDT0可通过寄存器位将端口切换为编程端口或通用端口</A1>
					 </DBGPIN0>		
					 <DBGPIN1>
					    <annotation>PCK1/PDT1编程端口设置</annotation>
						<bit>BIT[6:6]</bit>
						<A0>PCK1/PDT1在复位时固定为编程端口，复位完成后固定为通用端口</A0>
						<A1>PCK1/PDT1可通过寄存器位将端口切换为编程端口或通用端口</A1>
					 </DBGPIN1>		
					 <SPDS>
					    <annotation>I/O翻转速度设置</annotation>
						<bit>BIT[7:7]</bit>
						<A0>低速输出</A0>
						<A1>高速输出</A1>
					 </SPDS>			
					 <default>
						  <annotation>默认</annotation>
							<bit>BIT[8:8]</bit>
							<A0>默认为0</A0>
					 </default>
					 <OPAEN>
					    <annotation>OP0/OP1使能设置</annotation>
						<bit>BIT[9:9]</bit>
						<A0>OP0/OP1是否开启由寄存器位OP0EN/OP1EN控制</A0>
						<A1>OP0/OP1始终开启，寄存器位OP0EN/OP1EN无效</A1>
					 </OPAEN>		
				</UOPT2>	
			  <DOPT1>
				  <address>0x8021</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT1>  
				<DOPT2>
				  <address>0x8022</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT2>  
				<DOPT3>
				  <address>0x8023</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT3> 
				<DOPT4>
				  <address>0x8024</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT4> 
				<DOPT5>
				  <address>0x8025</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT5> 
				<DOPT6>
				  <address>0x8026</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT6> 
				<DOPT7>
				  <address>0x8027</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[15:0]</bit>
							<A0000000000000000>默认为0</A0000000000000000>
					</default>
				</DOPT7> 			
				<DOPT8>
				  <address>0x8028</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT8> 
				<DOPT9>
				  <address>0x8029</address>	    
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT9> 	
				<DOPT10>
				  <address>0x802A</address>	   
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT10> 	
	 		</OPTIONS>
    </MCU>
   <MCU name="MC32F6921" type="RISC16" id="0x6921">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0000ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <!-- 0x790B -->
     <!--
     some evchip addr to Osccal_Adjust @2018.02.27 
     Osccal_Mode 功能开启总开关；		Osccal_Nop_num nup个数，用于osccal_S19的个数检测时间校准0x0640
     （Osccal_Nop_num，修改为osccal_7041工程的结束地址加1  20180829）
     Osccal_Time_Standard 校准标准，跟CPU及nop个数有关，如内部RC 16M、2T，8M，0.125us*1600，200us	。200*72=0x3840 	
     Osccal_USER_OPT0、1、2、3、4 配置初始值，其中包含内部RC、加密位、tadj、分频、16M等
     Osccal_Osc_bits osccal校准值的位数			Osccal_Osc_posit 02：OPT2；00：起始位置		Osccal_Osc_range 校准的范围 *1/100					
     -->
      <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0020" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0000" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0000" Osccal_Osc_bits="0x000B" Osccal_Osc_posit="0x0100" Osccal_Osc_range="0x1"/>
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x00C000" EEPROM_Size="0x0100"/>
			<firmware_cfg Firm_Ver="0x0404" Firm_name="ICE_SLIN_Fv4.4.srec"/>
      <function_cfg Opt_Anto="true" />
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="DRVCR" addr="0x18C" />
        <reg name="P0KBCR" addr="0x18D" />
        <reg name="P1KBCR" addr="0x18E" />
        <reg name="P2KBCR" addr="0x18F" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" />
        <reg name="T0CR" addr="0x198" />
        <reg name="T0CNT" addr="0x199" />
        <reg name="T0LOAD" addr="0x19A" />
        <reg name="T0DATA" addr="0x19B" />
        <reg name="T1CR" addr="0x19C" />
        <reg name="T1CNT" addr="0x19D" />
        <reg name="T1LOAD" addr="0x19E" />
        <reg name="T1DATA" addr="0x19F" />
        <reg name="T2CR" addr="0x1A0" />
        <reg name="T2CNT" addr="0x1A1" />
        <reg name="T2LOAD" addr="0x1A2" />
        <reg name="T2DATA" addr="0x1A3" />
        <reg name="T3CR" addr="0x1A4" />
        <reg name="T3CNT" addr="0x1A5" />
        <reg name="T3LOAD" addr="0x1A6" />
        <reg name="PWM0DR" addr="0x1A8" />
        <reg name="PWM1DR" addr="0x1A9" />
        <reg name="PWM2DR" addr="0x1AA" />
        <reg name="PWMCR0" addr="0x1AC" />
        <reg name="PWMCR1" addr="0x1AD" />
        <reg name="OSCMR" addr="0x1AE" />
        <reg name="LVDCR" addr="0x1AF" />
        <reg name="IOP2" addr="0x1B8" />
        <reg name="OEP2" addr="0x1B9" />
        <reg name="PUP2" addr="0x1BA" />
        <reg name="PDP2" addr="0x1BB" />
        <reg name="PMOD" addr="0x1BC" />
        <reg name="PWMCR3" addr="0x1BD" />
        <reg name="PWMCR2" addr="0x1BE" />
        <reg name="PFRCCR" addr="0x1C0" />
        <reg name="PFRCCAL" addr="0x1C1" />
        <reg name="EECR" addr="0x1C3" />
        <reg name="EEPR" addr="0x1C4" />
        <reg name="EEAR" addr="0x1C5" />
        <reg name="EEDRH" addr="0x1C6" />
        <reg name="EEDRL" addr="0x1C7" />
        <reg name="DBGCR" addr="0x1F5" />
        <reg name="DBGPR" addr="0x1F6" />
        <reg name="HIRCCAL" addr="0x1FC" />
      </regs>
      <OPTIONS>
				<COPT1>
					<address>0x8001</address>		
					<default>
						  <annotation>默认</annotation>
							<bit>BIT[7:0]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</COPT1>
				<UOPT1>
				    <address>0x8011</address>
				    <WDTM>
					    <annotation>WDT模式设置</annotation>
							<bit>BIT[1:0]</bit>
							<A00>WDT始终关闭</A00>
							<A01>WDT在运行模式下开启，在低功耗模式下关闭</A01>
							<A11>WDT始终开启</A11>
					 </WDTM>
					 <RSTEN>
				 	    <annotation>RST外部复位设置</annotation>
				 	    <bit>BIT[2:2]</bit>
				 	    <A0>P13为输入/输出脚</A0>
					    <A1>P13为外部复位脚</A1>  
					 </RSTEN>	
					 <VLVRS>
						  <annotation>低压复位电压选择位</annotation>
						  <bit>BIT[6:4]</bit>		
						  <A001>4.1V</A001>	
							<A100>2.7V</A100>	
							<A101>2.4V</A101>			
							<A110>2.0V</A110>			
					 </VLVRS> 
					 <WDTT>
					    <annotation>WDT溢出时间选择</annotation>
					    <bit>BIT[10:8]</bit>
					    <A000>4096ms</A000>
							<A001>2048ms</A001>
							<A010>1024ms</A010>
							<A100>256ms</A100>
							<A110>64ms</A110>
							<A111>16ms</A111>
					 </WDTT>	
					 <ENCR>
				 	    <annotation>程序代码加密选项</annotation>
				 	    <bit>BIT[13:13]</bit>
				 	    <A0>程序代码不加密</A0>
					    <A1>程序代码加密</A1>  
					 </ENCR>	
				</UOPT1>
				<UOPT2>
				    <address>0x8012</address>
					  <FCPUS>
						  <annotation>高频时钟下FCPU分频选择</annotation>
						  <bit>BIT[2:0]</bit>		
							<A010>FCPU=FHOSC/64</A010>		
							<A011>FCPU=FHOSC/32</A011>	
							<A100>FCPU=FHOSC/16</A100>				
							<A101>FCPU=FHOSC/8</A101>	
							<A110>FCPU=FHOSC/4</A110>		
							<A111>FCPU=FHOSC/2</A111>		
					 </FCPUS> 
					 <SMTVS>
					 	  <annotation>端口施密特阈值选择</annotation>
					 	 <bit>BIT[3:3]</bit>
					 	 <A0>2.0V/0.8V</A0>
						 <A1>0.8VDD/0.2VDD</A1>
					 </SMTVS>
					 <LOSCS>
					    <annotation>低频选择</annotation>
						<bit>BIT[4:4]</bit>
						<A0>外部32768Hz晶体振荡器时钟FXTAL</A0>
						<A1>FLOSC=内部低频RC振荡器时钟FLIRC</A1>
					 </LOSCS>			 
					 <DBGPIN0>
					    <annotation>PCK0/PDT0编程端口设置</annotation>
						<bit>BIT[5:5]</bit>
						<A0>芯片仅在复位时可通过P16/P17进入编程/仿真模式</A0>
						<A1>P16/P17仅用作编程/仿真接口，芯片可随时切入编程/仿真模式</A1>
					 </DBGPIN0>		
					 <DBGPIN1>
					    <annotation>PCK1/PDT1编程端口设置</annotation>
						<bit>BIT[6:6]</bit>
						<A0>芯片仅在复位时可通过P04/P15进入编程/仿真模式</A0>
						<A1>P04/P15仅用作编程/仿真接口，芯片可随时切入编程/仿真模式</A1>
					 </DBGPIN1>		
					 <SPDS>
					    <annotation>I/O（除P16/P17外）翻转速度设置</annotation>
						<bit>BIT[4:4]</bit>
						<A0>低速输出</A0>
						<A1>高速输出</A1>
					 </SPDS>			
				</UOPT2>	
			  <DOPT1>
				  <address>0x8021</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT1>  
				<DOPT2>
				  <address>0x8022</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT2>  
				<DOPT3>
				  <address>0x8023</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT3> 
				<DOPT4>
				  <address>0x8024</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT4> 
				<DOPT5>
				  <address>0x8025</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT5> 
				<DOPT6>
				  <address>0x8026</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT6> 
				<DOPT7>
				  <address>0x8027</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT7> 
				<DOPT8>
				  <address>0x8028</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT8> 				
				<DOPT9>
				  <address>0x8029</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:8]</bit>
							<A00000000>默认为0</A00000000>
					</default>
				</DOPT9> 
				<DOPT10>
				  <address>0x802A</address>	    
				  <default>
						  <annotation>默认</annotation>
							<bit>BIT[15:13]</bit>
							<A000>默认为0</A000>
					</default>
				</DOPT10> 	
	 		</OPTIONS>
    </MCU>
    <MCU name="MC30F6910" type="RISC14" id="0x6910">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x007F" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x00C000" EEPROM_Size="0x0040"/>
			<firmware_cfg Firm_Ver="0x0401" Firm_name="ICE_SLIN_Fv4.1.srec"/>
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="P1" addr="0x06" />
        <reg name="MCR" addr="0x08" />
        <reg name="T0CR" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON1" addr="0x0B" />
        <reg name="PUCON1" addr="0x0C" />
        <reg name="ODCON1" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="P1KBCR" addr="0x41" />
        <reg name="OSCMR" addr="0x42" />
        <reg name="DDR1" addr="0x46" />
        <reg name="TMRCR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
				<reg name="T1DATB" addr="0x50" />
				<reg name="T1DATC" addr="0x51" />
				<reg name="T1DATD" addr="0x52" />
				<reg name="PWM1CR0" addr="0x55" />
				<reg name="PWM1CR1" addr="0x56" />
				<reg name="PWM1CR2" addr="0x57" />
				<reg name="EECR" addr="0x5C" />
				<reg name="EEPR" addr="0x5D" />
				<reg name="EEAR" addr="0x5E" />
				<reg name="EEDR" addr="0x5F" />
      </regs>
    </MCU>   
    <MCU name="MC30F6920" type="RISC14" id="0x6920">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x007F" chip_ramSize="0x0080" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8003ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
		  <osccal_cfg  Osccal_Mode="false" Osccal_Nop_num="0x000E" Osccal_Time_Standard="0x7896" Osccal_USER_OPT0="0x0000" Osccal_USER_OPT1="0x0000" Osccal_USER_OPT2="0x0800" 
      	Osccal_USER_OPT3="0x0000" Osccal_USER_OPT4="0x0007" Osccal_Osc_bits="0x0008" Osccal_Osc_posit="0x0200" Osccal_Osc_range="0x1"/>
      <mtp_cfg MTP_Flag="true" EEPROM_Flag="true" EEPROM_AddrFirst="0x00C000" EEPROM_Size="0x0040"/>
			<firmware_cfg Firm_Ver="0x0401" Firm_name="ICE_SLIN_Fv4.1.srec"/>
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="P0" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="MCR" addr="0x08" />
        <reg name="T0CR" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON1" addr="0x0B" />
        <reg name="PUCON1" addr="0x0C" />
        <reg name="ODCON1" addr="0x0D" />
        <reg name="INTE" addr="0x0E" />
        <reg name="INTF" addr="0x0F" />
        <reg name="P0KBCR" addr="0x40" />
        <reg name="P1KBCR" addr="0x41" />
        <reg name="OSCMR" addr="0x42" />
        <reg name="PDCON0" addr="0x43" />
        <reg name="PUCON0" addr="0x44" />
        <reg name="DDR0" addr="0x45" />
        <reg name="DDR1" addr="0x46" />
        <reg name="TMRCR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
				<reg name="T1DATB" addr="0x50" />
				<reg name="T1DATC" addr="0x51" />
				<reg name="T1DATD" addr="0x52" />
				<reg name="PWM1CR0" addr="0x55" />
				<reg name="PWM1CR1" addr="0x56" />
				<reg name="PWM1CR2" addr="0x57" />
				<reg name="EECR" addr="0x5C" />
				<reg name="EEPR" addr="0x5D" />
				<reg name="EEAR" addr="0x5E" />
				<reg name="EEDR" addr="0x5F" />
      </regs>
    </MCU> 
    <MCU name="MC30P6030(MC30P011)" type="RISC14" id="0x0311">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x004f" chip_ramSize="0x50" />
      <ev_cfg ev_romFirstAddr="0x0000" ev_romEndAddr="0x07ff" ev_ramFirstAddr="0x8000" ev_ramEndAddr="0x804f" ev_bkFirstAddr="0x8f00" ev_bkEndAddr="0x8f1f" ev_pcFirstAddr="0x9000" ev_pcEndAddr="0x9039" ev_optionAddr="0x9100" ev_optionCnt="0x04" ev_traceFirstAddr="0xc000" ev_traceEndAddr="0xc7ff" />
			<firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>   
      <syss>
        <sys name="PC" value="0x03ff" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="the Second stack addr" />
        <sys name="Stack3" value="0xffff" describe="the third stack addr" />
        <sys name="Stack4" value="0xffff" describe="the fourth stack addr " />
        <sys name="Stack5" value="0xffff" describe="the fifth stack addr" />
        <sys name="STATUS(7).RST" value="0" describe="唤醒源标志：1=P6变化唤醒；0=其它复位唤醒" />
        <sys name="STATUS(6).GP1" value="0" describe="通用寄存器位" />
        <sys name="STATUS(5).GP0" value="0" describe="通用寄存器位" />
        <sys name="STATUS(4).TO" value="0" describe="超时位" />
        <sys name="STATUS(3).PD" value="0" describe="掉电位" />
        <sys name="STATUS(2).Z" value="0" describe="结果为0标志位" />
        <sys name="STATUS(1).DC" value="0" describe="半进位/借位标志位" />
        <sys name="STATUS(0).C" value="0" describe="进位/借位标志位" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="T0CNT" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="STATUS" addr="0x03" />
        <reg name="FSR" addr="0x04" />
        <reg name="P0" addr="0x05" />
        <reg name="P1" addr="0x06" />
        <reg name="GPR" addr="0x07" />
        <reg name="MCR" addr="0x08" />
        <reg name="KBIM" addr="0x09" />
        <reg name="PCLATH" addr="0x0A" />
        <reg name="PDCON" addr="0x0B" />
        <reg name="ODCON" addr="0x0C" />
        <reg name="PUCON" addr="0x0D" />
        <reg name="INTECON" addr="0x0E" />
        <reg name="INTFLAG" addr="0x0F" />
        <reg name="T0CR" addr="0x41" />
        <reg name="DDR0" addr="0x45" />
        <reg name="DDR1" addr="0x46" />
        <reg name="TMCR" addr="0x4B" />
        <reg name="T1CR" addr="0x4C" />
        <reg name="T1CNT" addr="0x4D" />
        <reg name="T1LOAD" addr="0x4E" />
        <reg name="T1DATA" addr="0x4F" />
      </regs>
    </MCU>
    <MCU name="MC32T8132(试用版)" type="RISC16" id="0x8132">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x0800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x803fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0003ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x1A0" />
        <reg name="INDF1" addr="0x1A1" />
        <reg name="INDF2" addr="0x1A2" />
        <reg name="HIBYTE" addr="0x1A3" />
        <reg name="FSR0" addr="0x1A4" />
        <reg name="FSR1" addr="0x1A5" />
        <reg name="PCL" addr="0x1A6" />
        <reg name="PFLAG" addr="0x1A7" />
        <reg name="MCR" addr="0x1A8" />
        <reg name="INDF3" addr="0x1A9" />
        <reg name="INTE" addr="0x1AA" />
        <reg name="INTF" addr="0x1AB" />
        <reg name="OSCM" addr="0x1AC" />
        <reg name="CLKO" addr="0x1AD" />
        <reg name="IOP0" addr="0x1B0" />
        <reg name="OEP0" addr="0x1B1" />
        <reg name="PUP0" addr="0x1B2" />
        <reg name="PDP0" addr="0x1B3" />
        <reg name="IOP1" addr="0x1B4" />
        <reg name="OEP1" addr="0x1B5" />
        <reg name="PUP1" addr="0x1B6" />
        <reg name="PDP1" addr="0x1B7" />
        <reg name="IOP2" addr="0x1B8" />
        <reg name="OEP2" addr="0x1B9" />
        <reg name="PUP2" addr="0x1BA" />
        <reg name="PDP2" addr="0x1BB" />
        <reg name="IOP3" addr="0x1BC" />
        <reg name="OEP3" addr="0x1BD" />
        <reg name="PUP3" addr="0x1BE" />
        <reg name="PDP3" addr="0x1BF" />
        <reg name="T0CR" addr="0x1C0" />
        <reg name="T0CNT" addr="0x1C1" />
        <reg name="T0LOAD" addr="0x1C2" />
        <reg name="T0DATA" addr="0x1C3" />
        <reg name="T1CR" addr="0x1C4" />
        <reg name="T1CNT" addr="0x1C5" />
        <reg name="T1LOAD" addr="0x1C6" />
        <reg name="T1DATA" addr="0x1C7" />
        <reg name="T2CR" addr="0x1C8" />
        <reg name="T2CNTH" addr="0x1C9" />
        <reg name="T2CNTL" addr="0x1CA" />
        <reg name="T2LOADH" addr="0x1CB" />
        <reg name="T2LOADL" addr="0x1CC" />
        <reg name="TK0CR0" addr="0x1D0" />
        <reg name="TK0CR1" addr="0x1D1" />
        <reg name="TK0CR2" addr="0x1D2" />
        <reg name="TK0CNTH" addr="0x1D3" />
        <reg name="TK0CNTL" addr="0x1D4" />
        <reg name="TK1CR0" addr="0x1D8" />
        <reg name="TK1CR1" addr="0x1D9" />
        <reg name="TK1CR2" addr="0x1DA" />
        <reg name="TK1CNTH" addr="0x1DB" />
        <reg name="TK1CNTL" addr="0x1DC" />
        <reg name="ADCR0" addr="0x1E0" />
        <reg name="ADCR1" addr="0x1E1" />
        <reg name="ADCR2" addr="0x1E2" />
        <reg name="ADIO0" addr="0x1E3" />
        <reg name="ADIO1" addr="0x1E4" />
        <reg name="ADRH" addr="0x1E5" />
        <reg name="ADRL" addr="0x1E6" />
        <reg name="LEDDS1" addr="0x1E8" />
        <reg name="LEDDS2" addr="0x1E9" />
        <reg name="LEDDS3" addr="0x1EA" />
        <reg name="LEDDS4" addr="0x1EB" />
        <reg name="LEDDS5" addr="0x1EC" />
        <reg name="LEDDS6" addr="0x1ED" />
        <reg name="LEDDS7" addr="0x1EE" />
        <reg name="LEDDS8" addr="0x1EF" />
        <reg name="LEDCR0" addr="0x1F0" />
        <reg name="LEDCR1" addr="0x1F1" />
        <reg name="LEDIOS0" addr="0x1F2" />
        <reg name="LEDIOS1" addr="0x1F3" />
        <reg name="LEDDRV" addr="0x1F4" />
      </regs>
    </MCU>  
    <MCU name="MC31P5120(MC31P11)" type="RISC14" id="0x3111">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x004f" chip_ramSize="0x50" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00004f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x03ff" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="the Second stack addr" />
        <sys name="Stack3" value="0xffff" describe="the third stack addr" />
        <sys name="Stack4" value="0xffff" describe="the fourth stack addr " />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF" addr="0x00" />
        <reg name="FSR" addr="0x01" />
        <reg name="PCL" addr="0x02" />
        <reg name="PFLAG" addr="0x03" />
        <reg name="MCR" addr="0x04" />
        <reg name="INTE" addr="0x05" />
        <reg name="INTF" addr="0x06" />
        <reg name="IOP0" addr="0x07" />
        <reg name="OEP0" addr="0x08" />
        <reg name="PUP0" addr="0x09" />
        <reg name="DKWP0" addr="0x0A" />
        <reg name="IOP1" addr="0x0B" />
        <reg name="OEP1" addr="0x0C" />
        <reg name="PUP1" addr="0x0D" />
        <reg name="DKWP1" addr="0x0E" />
        <reg name="DWK" addr="0x0F" />
      </regs>
    </MCU>
    <MCU name="MC32P5213(MC33P78)" type="RISC16" id="0x3378">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x1fff" chip_romSize="0x2000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x03ff" chip_ramSize="0x0400" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x803fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0003ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x1B0" />
        <reg name="INDF1" addr="0x1B1" />
        <reg name="INDF2" addr="0x1B2" />
        <reg name="HIBYTE" addr="0x1B3" />
        <reg name="FSR0" addr="0x1B4" />
        <reg name="FSR1" addr="0x1B5" />
        <reg name="PCL" addr="0x1B6" />
        <reg name="PFLAG" addr="0x1B7" />
        <reg name="MCR" addr="0x1B8" />
        <reg name="INDF3" addr="0x1B9" />
        <reg name="INTE" addr="0x1BA" />
        <reg name="INTF" addr="0x1BB" />
        <reg name="OSCM" addr="0x1BC" />
        <reg name="IOP1" addr="0x1C8" />
        <reg name="OEP1" addr="0x1C9" />
        <reg name="PUP1" addr="0x1CA" />
        <reg name="DKWP1" addr="0x1CE" />
        <reg name="IOP2" addr="0x1D0" />
        <reg name="OEP2" addr="0x1D1" />
        <reg name="PUP2" addr="0x1D2" />
        <reg name="DKWP2" addr="0x1D6" />
        <reg name="T0CR" addr="0x1D8" />
        <reg name="T0LOADH" addr="0x1D9" />
        <reg name="T0LOADL" addr="0x1DA" />
        <reg name="T0TATRH" addr="0x1DB" />
        <reg name="T0TATRL" addr="0x1DC" />
        <reg name="T0LATFH" addr="0x1DD" />
        <reg name="T0LATFL" addr="0x1DE" />
        <reg name="T1CR" addr="0x1E0" />
        <reg name="T1DATA" addr="0x1E1" />
        <reg name="T1LOAD" addr="0x1E2" />
        <reg name="OPCR0" addr="0x1E4" />
        <reg name="OPCR1" addr="0x1E5" />
        <reg name="DWK0" addr="0x1E6" />
        <reg name="DWK1" addr="0x1E7" />
      </regs>
    </MCU>
    <MCU name="MC32P5222" type="RISC16" id="0x5222">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0ff0" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x803fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0003ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x1B0" />
        <reg name="INDF1" addr="0x1B1" />
        <reg name="INDF2" addr="0x1B2" />
        <reg name="HIBYTE" addr="0x1B3" />
        <reg name="FSR0" addr="0x1B4" />
        <reg name="FSR1" addr="0x1B5" />
        <reg name="PCL" addr="0x1B6" />
        <reg name="PFLAG" addr="0x1B7" />
        <reg name="MCR" addr="0x1B8" />
        <reg name="INDF3" addr="0x1B9" />
        <reg name="INTE" addr="0x1BA" />
        <reg name="INTF" addr="0x1BB" />
        <reg name="OSCM" addr="0x1BC" />
        <reg name="LVDCR" addr="0x1BD" />
        <reg name="MTPADH" addr="0x1C0" />
        <reg name="MTPADL" addr="0x1C1" />
        <reg name="MTPDB" addr="0x1C2" />
        <reg name="MTPMD" addr="0x1C3" />
        <reg name="MTPCTR" addr="0x1C4" />
        <!-- <reg name="MTPMG" addr="0x1C5" /> -->
        <reg name="IOP1" addr="0x1C8" />
        <reg name="OEP1" addr="0x1C9" />
        <reg name="PUP1" addr="0x1CA" />
        <reg name="DKWP1" addr="0x1CE" />
        <reg name="IOP2" addr="0x1D0" />
        <reg name="OEP2" addr="0x1D1" />
        <reg name="PUP2" addr="0x1D2" />
        <reg name="DKWP2" addr="0x1D6" />
        <reg name="T0CR" addr="0x1D8" />
        <reg name="T0LOADH" addr="0x1D9" />
        <reg name="T0LOADL" addr="0x1DA" />
        <reg name="T0TATRH" addr="0x1DB" />
        <reg name="T0TATRL" addr="0x1DC" />
        <reg name="T0LATFH" addr="0x1DD" />
        <reg name="T0LATFL" addr="0x1DE" />
        <reg name="T1CR" addr="0x1E0" />
        <reg name="T1DATA" addr="0x1E1" />
        <reg name="T1LOAD" addr="0x1E2" />
        <reg name="OPCR0" addr="0x1E4" />
        <reg name="OPCR1" addr="0x1E5" />
        <reg name="DWK0" addr="0x1E6" />
        <reg name="DWK1" addr="0x1E7" />
      </regs>
    </MCU>
      <MCU name="MC32P5232(试用版)" type="RISC16" id="0x5232">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0ff0" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x803fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0003ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x1B0" />
        <reg name="INDF1" addr="0x1B1" />
        <reg name="INDF2" addr="0x1B2" />
        <reg name="HIBYTE" addr="0x1B3" />
        <reg name="FSR0" addr="0x1B4" />
        <reg name="FSR1" addr="0x1B5" />
        <reg name="PCL" addr="0x1B6" />
        <reg name="PFLAG" addr="0x1B7" />
        <reg name="MCR" addr="0x1B8" />
        <reg name="INDF3" addr="0x1B9" />
        <reg name="INTE" addr="0x1BA" />
        <reg name="INTF" addr="0x1BB" />
        <reg name="OSCM" addr="0x1BC" />
        <reg name="LVDCR" addr="0x1BD" />
        <reg name="MTPADH" addr="0x1C0" />
        <reg name="MTPADL" addr="0x1C1" />
        <reg name="MTPDB" addr="0x1C2" />
        <reg name="MTPMD" addr="0x1C3" />
        <reg name="MTPCTR" addr="0x1C4" />
        <reg name="IOP1" addr="0x1C8" />
        <reg name="OEP1" addr="0x1C9" />
        <reg name="PUP1" addr="0x1CA" />
        <reg name="DKWP1" addr="0x1CE" />
        <reg name="IOP2" addr="0x1D0" />
        <reg name="OEP2" addr="0x1D1" />
        <reg name="PUP2" addr="0x1D2" />
        <reg name="DKWP2" addr="0x1D6" />
        <reg name="T0CR" addr="0x1D8" />
        <reg name="T0LOADH" addr="0x1D9" />
        <reg name="T0LOADL" addr="0x1DA" />
        <reg name="T0TATRH" addr="0x1DB" />
        <reg name="T0TATRL" addr="0x1DC" />
        <reg name="T0LATFH" addr="0x1DD" />
        <reg name="T0LATFL" addr="0x1DE" />
        <reg name="T1CR" addr="0x1E0" />
        <reg name="T1DATA" addr="0x1E1" />
        <reg name="T1LOAD" addr="0x1E2" />
        <reg name="OPCR0" addr="0x1E4" />
        <reg name="DKW0" addr="0x1E6" />
      </regs>
    </MCU>
    <MCU name="MC32P8112(MC32P64)" type="RISC16" id="0x3264">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x0fff" chip_romSize="0x1000" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x013f" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x801fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x000200" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x1B0" />
        <reg name="INDF1" addr="0x1B1" />
        <reg name="INDF2" addr="0x1B2" />
        <reg name="HIBYTE" addr="0x1B3" />
        <reg name="FSR0" addr="0x1B4" />
        <reg name="FSR1" addr="0x1B5" />
        <reg name="PCL" addr="0x1B6" />
        <reg name="PFLAG" addr="0x1B7" />
        <reg name="MCR" addr="0x1B8" />
        <reg name="INDF3" addr="0x1B9" />
        <reg name="INTE" addr="0x1BA" />
        <reg name="INTF" addr="0x1BB" />
        <reg name="OSCM" addr="0x1BC" />
        <reg name="IOP0" addr="0x1C0" />
        <reg name="OEP0" addr="0x1C1" />
        <reg name="PUP0" addr="0x1C2" />
        <reg name="IOP1" addr="0x1C4" />
        <reg name="OEP1" addr="0x1C5" />
        <reg name="PUP1" addr="0x1C6" />
        <reg name="IOP2" addr="0x1C8" />
        <reg name="OEP2" addr="0x1C9" />
        <reg name="PUP2" addr="0x1CA" />
        <reg name="IOP3" addr="0x1CC" />
        <reg name="OEP3" addr="0x1CD" />
        <reg name="PUP3" addr="0x1CE" />
        <reg name="T0CR" addr="0x1D0" />
        <reg name="T0CNT" addr="0x1D1" />
        <reg name="T0LOAD" addr="0x1D2" />
        <reg name="T0DATA" addr="0x1D3" />
        <reg name="T1CR" addr="0x1D4" />
        <reg name="T1CNT" addr="0x1D5" />
        <reg name="T1LOAD" addr="0x1D6" />
        <reg name="T1DATA" addr="0x1D7" />
        <reg name="T2CR" addr="0x1D8" />
        <reg name="T2CNTH" addr="0x1D9" />
        <reg name="T2CNTL" addr="0x1DA" />
        <reg name="T2LOADH" addr="0x1DB" />
        <reg name="T2LOADL" addr="0x1DC" />
        <reg name="TK0CRH" addr="0x1E0" />
        <reg name="TK0CRL" addr="0x1E1" />
        <reg name="TK0CNTH" addr="0x1E2" />
        <reg name="TK0CNTL" addr="0x1E3" />
        <reg name="TK1CRH" addr="0x1E4" />
        <reg name="TK1CRL" addr="0x1E5" />
        <reg name="TK1CNTH" addr="0x1E6" />
        <reg name="TK1CNTL" addr="0x1E7" />
        <reg name="TK2CRH" addr="0x1E8" />
        <reg name="TK2CRL" addr="0x1E9" />
        <reg name="TK2CNTH" addr="0x1EA" />
        <reg name="TK2CNTL" addr="0x1EB" />
        <reg name="ADCR0" addr="0x1EC" />
        <reg name="ADCR1" addr="0x1ED" />
        <reg name="ADRH" addr="0x1EE" />
        <reg name="ADRL" addr="0x1EF" />
        <reg name="I2CCR" addr="0x1F0" />
        <reg name="I2CADDR" addr="0x1F1" />
        <reg name="I2CDATA" addr="0x1F2" />
        <reg name="OSCCAL" addr="0x1FB" />
      </regs>
    </MCU>
    <MCU name="MC32P7020(MC32P821)" type="RISC16" id="0x32821">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x007f" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="ANSEL" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="KBCR" addr="0x197" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A4" />
        <reg name="T1CNT" addr="0x1A5" />
        <reg name="T1LOAD" addr="0x1A6" />
        <reg name="T1DATA" addr="0x1A7" />
        <reg name="T2CR" addr="0x1A8" />
        <reg name="T2CNT" addr="0x1A9" />
        <reg name="T2LOAD" addr="0x1AA" />
        <reg name="PWMCR" addr="0x1AC" />
        <reg name="OSCM" addr="0x1AE" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
        <reg name="OSCCAL" addr="0x1FB" />
      </regs>
    </MCU>
    <MCU name="MC32P7010(MC32P21)" type="RISC16" id="0x3221">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x007f" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x8007ff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x00007f" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="ANSEL" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="KBCR" addr="0x197" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A4" />
        <reg name="T1CNT" addr="0x1A5" />
        <reg name="T1LOAD" addr="0x1A6" />
        <reg name="T1DATA" addr="0x1A7" />
        <reg name="OSCM" addr="0x1AE" /> 
        <reg name="LVDCR" addr="0x1AF" />       
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
        <reg name="OSCCAL" addr="0x1FB" />
      </regs>
    </MCU>
    <MCU name="MC32P7510" type="RISC16" id="0x7510">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x03ff" chip_romSize="0x0400" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x803fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0003ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A4" />
        <reg name="T1CNT" addr="0x1A5" />
        <reg name="T1LOAD" addr="0x1A6" />
        <reg name="T1DATA" addr="0x1A7" />
        <reg name="AUCR" addr="0x1A8" />
        <reg name="KBCR" addr="0x1A9" />
        <reg name="OSCM" addr="0x1AE" />
        <reg name="LVDCR" addr="0x1AF" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="AN0SEL" addr="0x1B2" />
        <reg name="AN1SEL" addr="0x1B3" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
        <reg name="OSCCAL" addr="0x1FB" />
      </regs>
    </MCU>    
    <MCU name="MC32P7511(试用版)" type="RISC16" id="0x7511">
      <chip_cfg chip_romFirstAddr="0x0000" chip_romEndAddr="0x07ff" chip_romSize="0x0800" chip_ramFirstAddr="0x0000" chip_ramEndAddr="0x01ff" chip_ramSize="0x0200" />
      <ev_cfg ev_romFirstAddr="0x800000" ev_romEndAddr="0x803fff" ev_ramFirstAddr="0x000000" ev_ramEndAddr="0x0003ff" ev_bkFirstAddr="0x010000" ev_bkEndAddr="0x01003f" ev_pcFirstAddr="0x010100" ev_pcEndAddr="0x01021f" ev_optionAddr="0x7ffff0" ev_optionCnt="0x0f" ev_traceFirstAddr="0x01fffe" ev_traceEndAddr="0x02ffff" />
      <firmware_cfg Firm_Ver="0x0202" Firm_name="ICE_SLIN_Fv2.2.srec"/>  
      <syss>
        <sys name="PC" value="0x0000" describe="A state reg" />
        <sys name="SP" value="0xff" describe="SP pointer reg" />
        <sys name="A" value="0xff" describe="A state reg" />
        <sys name="Stack1" value="0xffff" describe="堆栈地址" />
        <sys name="Stack2" value="0xffff" describe="第二级堆栈" />
        <sys name="Stack3" value="0xffff" describe="第三级堆栈" />
        <sys name="Stack4" value="0xffff" describe="第四级堆栈" />
        <sys name="Stack5" value="0xffff" describe="第五级堆栈" />
        <sys name="Stack6" value="0xffff" describe="第六级堆栈" />
        <sys name="Stack7" value="0xffff" describe="第七级堆栈" />
        <sys name="Stack8" value="0xffff" describe="第八级堆栈" />
      </syss>
      <option>
        <CP>abcddd</CP>
      </option>
      <regs>
        <reg name="INDF0" addr="0x180" />
        <reg name="INDF1" addr="0x181" />
        <reg name="INDF2" addr="0x182" />
        <reg name="HIBYTE" addr="0x183" />
        <reg name="FSR0" addr="0x184" />
        <reg name="FSR1" addr="0x185" />
        <reg name="PCL" addr="0x186" />
        <reg name="PFLAG" addr="0x187" />
        <reg name="MCR" addr="0x188" />
        <reg name="INDF3" addr="0x189" />
        <reg name="INTE" addr="0x18A" />
        <reg name="INTF" addr="0x18B" />
        <reg name="IOP0" addr="0x190" />
        <reg name="OEP0" addr="0x191" />
        <reg name="PUP0" addr="0x192" />
        <reg name="PDP0" addr="0x193" />
        <reg name="IOP1" addr="0x194" />
        <reg name="OEP1" addr="0x195" />
        <reg name="PUP1" addr="0x196" />
        <reg name="PDP1" addr="0x197" />
        <reg name="PWM0DE" addr="0x198" />
        <reg name="PWM1DE" addr="0x199" />
        <reg name="T0CR" addr="0x1A0" />
        <reg name="T0CNT" addr="0x1A1" />
        <reg name="T0LOAD" addr="0x1A2" />
        <reg name="T0DATA" addr="0x1A3" />
        <reg name="T1CR" addr="0x1A4" />
        <reg name="T1CNT" addr="0x1A5" />
        <reg name="T1LOAD" addr="0x1A6" />
        <reg name="T1DATA" addr="0x1A7" />
        <reg name="AUCR" addr="0x1A8" />
        <reg name="KBCR" addr="0x1A9" />
        <reg name="OSCM" addr="0x1AE" />
        <reg name="LVDCR" addr="0x1AF" />
        <reg name="ADCR0" addr="0x1B0" />
        <reg name="ADCR1" addr="0x1B1" />
        <reg name="AN0SEL" addr="0x1B2" />
        <reg name="AN1SEL" addr="0x1B3" />
        <reg name="ADRH" addr="0x1B4" />
        <reg name="ADRL" addr="0x1B5" />
        <reg name="ADCR2" addr="0x1B6" />
        <reg name="OSCCAL" addr="0x1FA" />
      </regs>
    </MCU>
  </MCUS>
</WinScope>